Commit a5e0091d authored by Lucas Tanure's avatar Lucas Tanure Committed by Mark Brown

ASoC: cs35l41: Fix link problem

Can't link I2C and SPI to the same binary, better
to move CS35L41 to 3 modules approach.
And instead of exposing cs35l41_reg, volatile_reg,
readable_reg and precious_reg arrays, move
cs35l41_regmap_i2c/spi to new module and expose it.
Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211125143501.7720-1-tanureal@opensource.cirrus.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0b189395
...@@ -612,14 +612,19 @@ config SND_SOC_CS35L36 ...@@ -612,14 +612,19 @@ config SND_SOC_CS35L36
tristate "Cirrus Logic CS35L36 CODEC" tristate "Cirrus Logic CS35L36 CODEC"
depends on I2C depends on I2C
config SND_SOC_CS35L41
tristate
config SND_SOC_CS35L41_SPI config SND_SOC_CS35L41_SPI
tristate "Cirrus Logic CS35L41 CODEC (SPI)" tristate "Cirrus Logic CS35L41 CODEC (SPI)"
depends on SPI_MASTER depends on SPI_MASTER
select SND_SOC_CS35L41
select REGMAP_SPI select REGMAP_SPI
config SND_SOC_CS35L41_I2C config SND_SOC_CS35L41_I2C
tristate "Cirrus Logic CS35L41 CODEC (I2C)" tristate "Cirrus Logic CS35L41 CODEC (I2C)"
depends on I2C depends on I2C
select SND_SOC_CS35L41
select REGMAP_I2C select REGMAP_I2C
config SND_SOC_CS42L42 config SND_SOC_CS42L42
......
...@@ -54,8 +54,9 @@ snd-soc-cs35l33-objs := cs35l33.o ...@@ -54,8 +54,9 @@ snd-soc-cs35l33-objs := cs35l33.o
snd-soc-cs35l34-objs := cs35l34.o snd-soc-cs35l34-objs := cs35l34.o
snd-soc-cs35l35-objs := cs35l35.o snd-soc-cs35l35-objs := cs35l35.o
snd-soc-cs35l36-objs := cs35l36.o snd-soc-cs35l36-objs := cs35l36.o
snd-soc-cs35l41-spi-objs := cs35l41-spi.o cs35l41.o cs35l41-tables.o snd-soc-cs35l41-objs := cs35l41.o cs35l41-tables.o
snd-soc-cs35l41-i2c-objs := cs35l41-i2c.o cs35l41.o cs35l41-tables.o snd-soc-cs35l41-spi-objs := cs35l41-spi.o
snd-soc-cs35l41-i2c-objs := cs35l41-i2c.o
snd-soc-cs42l42-objs := cs42l42.o snd-soc-cs42l42-objs := cs42l42.o
snd-soc-cs42l51-objs := cs42l51.o snd-soc-cs42l51-objs := cs42l51.o
snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o
...@@ -391,6 +392,7 @@ obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o ...@@ -391,6 +392,7 @@ obj-$(CONFIG_SND_SOC_CS35L33) += snd-soc-cs35l33.o
obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o obj-$(CONFIG_SND_SOC_CS35L34) += snd-soc-cs35l34.o
obj-$(CONFIG_SND_SOC_CS35L35) += snd-soc-cs35l35.o obj-$(CONFIG_SND_SOC_CS35L35) += snd-soc-cs35l35.o
obj-$(CONFIG_SND_SOC_CS35L36) += snd-soc-cs35l36.o obj-$(CONFIG_SND_SOC_CS35L36) += snd-soc-cs35l36.o
obj-$(CONFIG_SND_SOC_CS35L41) += snd-soc-cs35l41.o
obj-$(CONFIG_SND_SOC_CS35L41_SPI) += snd-soc-cs35l41-spi.o obj-$(CONFIG_SND_SOC_CS35L41_SPI) += snd-soc-cs35l41-spi.o
obj-$(CONFIG_SND_SOC_CS35L41_I2C) += snd-soc-cs35l41-i2c.o obj-$(CONFIG_SND_SOC_CS35L41_I2C) += snd-soc-cs35l41-i2c.o
obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42.o
......
...@@ -20,21 +20,6 @@ ...@@ -20,21 +20,6 @@
#include <sound/cs35l41.h> #include <sound/cs35l41.h>
#include "cs35l41.h" #include "cs35l41.h"
static struct regmap_config cs35l41_regmap_i2c = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = CS35L41_REGSTRIDE,
.reg_format_endian = REGMAP_ENDIAN_BIG,
.val_format_endian = REGMAP_ENDIAN_BIG,
.max_register = CS35L41_LASTREG,
.reg_defaults = cs35l41_reg,
.num_reg_defaults = ARRAY_SIZE(cs35l41_reg),
.volatile_reg = cs35l41_volatile_reg,
.readable_reg = cs35l41_readable_reg,
.precious_reg = cs35l41_precious_reg,
.cache_type = REGCACHE_RBTREE,
};
static const struct i2c_device_id cs35l41_id_i2c[] = { static const struct i2c_device_id cs35l41_id_i2c[] = {
{ "cs35l40", 0 }, { "cs35l40", 0 },
{ "cs35l41", 0 }, { "cs35l41", 0 },
......
...@@ -18,22 +18,6 @@ ...@@ -18,22 +18,6 @@
#include <sound/cs35l41.h> #include <sound/cs35l41.h>
#include "cs35l41.h" #include "cs35l41.h"
static struct regmap_config cs35l41_regmap_spi = {
.reg_bits = 32,
.val_bits = 32,
.pad_bits = 16,
.reg_stride = CS35L41_REGSTRIDE,
.reg_format_endian = REGMAP_ENDIAN_BIG,
.val_format_endian = REGMAP_ENDIAN_BIG,
.max_register = CS35L41_LASTREG,
.reg_defaults = cs35l41_reg,
.num_reg_defaults = ARRAY_SIZE(cs35l41_reg),
.volatile_reg = cs35l41_volatile_reg,
.readable_reg = cs35l41_readable_reg,
.precious_reg = cs35l41_precious_reg,
.cache_type = REGCACHE_RBTREE,
};
static const struct spi_device_id cs35l41_id_spi[] = { static const struct spi_device_id cs35l41_id_spi[] = {
{ "cs35l40", 0 }, { "cs35l40", 0 },
{ "cs35l41", 0 }, { "cs35l41", 0 },
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#include "cs35l41.h" #include "cs35l41.h"
const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = { static const struct reg_default cs35l41_reg[] = {
{ CS35L41_PWR_CTRL1, 0x00000000 }, { CS35L41_PWR_CTRL1, 0x00000000 },
{ CS35L41_PWR_CTRL3, 0x01000010 }, { CS35L41_PWR_CTRL3, 0x01000010 },
{ CS35L41_GPIO_PAD_CONTROL, 0x00000000 }, { CS35L41_GPIO_PAD_CONTROL, 0x00000000 },
...@@ -47,7 +47,7 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = { ...@@ -47,7 +47,7 @@ const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG] = {
{ CS35L41_MIXER_NGATE_CH2_CFG, 0x00000303 }, { CS35L41_MIXER_NGATE_CH2_CFG, 0x00000303 },
}; };
bool cs35l41_readable_reg(struct device *dev, unsigned int reg) static bool cs35l41_readable_reg(struct device *dev, unsigned int reg)
{ {
switch (reg) { switch (reg) {
case CS35L41_DEVID: case CS35L41_DEVID:
...@@ -331,7 +331,7 @@ bool cs35l41_readable_reg(struct device *dev, unsigned int reg) ...@@ -331,7 +331,7 @@ bool cs35l41_readable_reg(struct device *dev, unsigned int reg)
} }
} }
bool cs35l41_precious_reg(struct device *dev, unsigned int reg) static bool cs35l41_precious_reg(struct device *dev, unsigned int reg)
{ {
switch (reg) { switch (reg) {
case CS35L41_OTP_MEM0 ... CS35L41_OTP_MEM31: case CS35L41_OTP_MEM0 ... CS35L41_OTP_MEM31:
...@@ -344,7 +344,7 @@ bool cs35l41_precious_reg(struct device *dev, unsigned int reg) ...@@ -344,7 +344,7 @@ bool cs35l41_precious_reg(struct device *dev, unsigned int reg)
} }
} }
bool cs35l41_volatile_reg(struct device *dev, unsigned int reg) static bool cs35l41_volatile_reg(struct device *dev, unsigned int reg)
{ {
switch (reg) { switch (reg) {
case CS35L41_DEVID: case CS35L41_DEVID:
...@@ -688,3 +688,36 @@ const struct cs35l41_otp_map_element_t cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS] ...@@ -688,3 +688,36 @@ const struct cs35l41_otp_map_element_t cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS]
.word_offset = 2, .word_offset = 2,
}, },
}; };
struct regmap_config cs35l41_regmap_i2c = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = CS35L41_REGSTRIDE,
.reg_format_endian = REGMAP_ENDIAN_BIG,
.val_format_endian = REGMAP_ENDIAN_BIG,
.max_register = CS35L41_LASTREG,
.reg_defaults = cs35l41_reg,
.num_reg_defaults = ARRAY_SIZE(cs35l41_reg),
.volatile_reg = cs35l41_volatile_reg,
.readable_reg = cs35l41_readable_reg,
.precious_reg = cs35l41_precious_reg,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_GPL(cs35l41_regmap_i2c);
struct regmap_config cs35l41_regmap_spi = {
.reg_bits = 32,
.val_bits = 32,
.pad_bits = 16,
.reg_stride = CS35L41_REGSTRIDE,
.reg_format_endian = REGMAP_ENDIAN_BIG,
.val_format_endian = REGMAP_ENDIAN_BIG,
.max_register = CS35L41_LASTREG,
.reg_defaults = cs35l41_reg,
.num_reg_defaults = ARRAY_SIZE(cs35l41_reg),
.volatile_reg = cs35l41_volatile_reg,
.readable_reg = cs35l41_readable_reg,
.precious_reg = cs35l41_precious_reg,
.cache_type = REGCACHE_RBTREE,
};
EXPORT_SYMBOL_GPL(cs35l41_regmap_spi);
...@@ -1731,6 +1731,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41, ...@@ -1731,6 +1731,7 @@ int cs35l41_probe(struct cs35l41_private *cs35l41,
return ret; return ret;
} }
EXPORT_SYMBOL_GPL(cs35l41_probe);
void cs35l41_remove(struct cs35l41_private *cs35l41) void cs35l41_remove(struct cs35l41_private *cs35l41)
{ {
...@@ -1739,6 +1740,7 @@ void cs35l41_remove(struct cs35l41_private *cs35l41) ...@@ -1739,6 +1740,7 @@ void cs35l41_remove(struct cs35l41_private *cs35l41)
regulator_bulk_disable(CS35L41_NUM_SUPPLIES, cs35l41->supplies); regulator_bulk_disable(CS35L41_NUM_SUPPLIES, cs35l41->supplies);
gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
} }
EXPORT_SYMBOL_GPL(cs35l41_remove);
MODULE_DESCRIPTION("ASoC CS35L41 driver"); MODULE_DESCRIPTION("ASoC CS35L41 driver");
MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>"); MODULE_AUTHOR("David Rhodes, Cirrus Logic Inc, <david.rhodes@cirrus.com>");
......
...@@ -538,7 +538,6 @@ ...@@ -538,7 +538,6 @@
#define CS35L41_OTP_TRIM_35 0x0000400C #define CS35L41_OTP_TRIM_35 0x0000400C
#define CS35L41_OTP_TRIM_36 0x00002030 #define CS35L41_OTP_TRIM_36 0x00002030
#define CS35L41_MAX_CACHE_REG 36
#define CS35L41_OTP_SIZE_WORDS 32 #define CS35L41_OTP_SIZE_WORDS 32
#define CS35L41_NUM_OTP_ELEM 100 #define CS35L41_NUM_OTP_ELEM 100
#define CS35L41_NUM_OTP_MAPS 5 #define CS35L41_NUM_OTP_MAPS 5
...@@ -734,9 +733,8 @@ ...@@ -734,9 +733,8 @@
#define CS35L41_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) #define CS35L41_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
#define CS35L41_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) #define CS35L41_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
bool cs35l41_readable_reg(struct device *dev, unsigned int reg); extern struct regmap_config cs35l41_regmap_i2c;
bool cs35l41_precious_reg(struct device *dev, unsigned int reg); extern struct regmap_config cs35l41_regmap_spi;
bool cs35l41_volatile_reg(struct device *dev, unsigned int reg);
struct cs35l41_otp_packed_element_t { struct cs35l41_otp_packed_element_t {
u32 reg; u32 reg;
...@@ -752,7 +750,6 @@ struct cs35l41_otp_map_element_t { ...@@ -752,7 +750,6 @@ struct cs35l41_otp_map_element_t {
u32 word_offset; u32 word_offset;
}; };
extern const struct reg_default cs35l41_reg[CS35L41_MAX_CACHE_REG];
extern const struct cs35l41_otp_map_element_t extern const struct cs35l41_otp_map_element_t
cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS]; cs35l41_otp_map_map[CS35L41_NUM_OTP_MAPS];
......
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