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Kirill Smelkov
linux
Commits
a605a1cf
Commit
a605a1cf
authored
Oct 10, 2003
by
Paul Mackerras
Browse files
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Merge samba.org:/stuff/paulus/kernel/linux-2.5
into samba.org:/stuff/paulus/kernel/for-linus-ppc
parents
3ee1e2b7
e5ca51a5
Changes
9
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Showing
9 changed files
with
16 additions
and
28 deletions
+16
-28
arch/ppc/8260_io/Kconfig
arch/ppc/8260_io/Kconfig
+0
-9
arch/ppc/Makefile
arch/ppc/Makefile
+6
-0
arch/ppc/boot/common/ns16550.c
arch/ppc/boot/common/ns16550.c
+2
-0
arch/ppc/configs/TQM8260_defconfig
arch/ppc/configs/TQM8260_defconfig
+0
-5
arch/ppc/configs/est8260_defconfig
arch/ppc/configs/est8260_defconfig
+0
-5
arch/ppc/kernel/cpu_setup_6xx.S
arch/ppc/kernel/cpu_setup_6xx.S
+0
-4
arch/ppc/kernel/setup.c
arch/ppc/kernel/setup.c
+1
-1
fs/proc/proc_devtree.c
fs/proc/proc_devtree.c
+6
-3
include/asm-ppc/mpc10x.h
include/asm-ppc/mpc10x.h
+1
-1
No files found.
arch/ppc/8260_io/Kconfig
View file @
a605a1cf
...
...
@@ -57,14 +57,5 @@ config FCC_QS6612
bool "QS6612"
endchoice
comment "Generic MPC8260 Options"
config DCACHE_DISABLE
bool "Disable data cache"
help
This option allows you to run the kernel with data cache disabled.
Say Y if you experience CPM lock-ups.
endmenu
arch/ppc/Makefile
View file @
a605a1cf
...
...
@@ -65,7 +65,13 @@ uImage: vmlinux
$(Q)$(MAKE)
$(build)
=
$(boot)
/images
$(boot)
/images/
$@
define
archhelp
@echo
'* zImage - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)'
@echo
' uImage - Create a bootable image for U-Boot / PPCBoot'
@echo
' install - Install kernel using'
@echo
' (your) ~/bin/installkernel or'
@echo
' (distribution) /sbin/installkernel or'
@echo
' install to $$(INSTALL_PATH) and run lilo'
@echo
' *_defconfig - Select default config from arch/$(ARCH)/ppc/configs'
endef
archclean
:
...
...
arch/ppc/boot/common/ns16550.c
View file @
a605a1cf
...
...
@@ -3,6 +3,8 @@
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
...
...
arch/ppc/configs/TQM8260_defconfig
View file @
a605a1cf
...
...
@@ -468,11 +468,6 @@ CONFIG_SCC_CONSOLE=y
CONFIG_FCC2_ENET=y
# CONFIG_FCC3_ENET is not set
#
# Generic MPC8260 Options
#
CONFIG_DCACHE_DISABLE=y
#
# USB support
#
...
...
arch/ppc/configs/est8260_defconfig
View file @
a605a1cf
...
...
@@ -460,11 +460,6 @@ CONFIG_SCC_ENET=y
#
CONFIG_SCC_CONSOLE=y
#
# Generic MPC8260 Options
#
# CONFIG_DCACHE_DISABLE is not set
#
# USB support
#
...
...
arch/ppc/kernel/cpu_setup_6xx.S
View file @
a605a1cf
...
...
@@ -75,11 +75,7 @@ _GLOBAL(__setup_cpu_745x)
setup_common_caches
:
mfspr
r11
,
HID0
andi
.
r0
,
r11
,
HID0_DCE
#ifdef CONFIG_DCACHE_DISABLE
ori
r11
,
r11
,
HID0_ICE
#else
ori
r11
,
r11
,
HID0_ICE
|
HID0_DCE
#endif
ori
r8
,
r11
,
HID0_ICFI
bne
1
f
/*
don
't invalidate the D-cache */
ori
r8
,
r8
,
HID0_DCI
/*
unless
it
wasn
't enabled */
...
...
arch/ppc/kernel/setup.c
View file @
a605a1cf
...
...
@@ -171,12 +171,12 @@ int show_cpuinfo(struct seq_file *m, void *v)
return
0
;
pvr
=
cpu_data
[
i
].
pvr
;
lpj
=
cpu_data
[
i
].
loops_per_jiffy
;
seq_printf
(
m
,
"processor
\t
: %d
\n
"
,
i
);
#else
pvr
=
mfspr
(
PVR
);
lpj
=
loops_per_jiffy
;
#endif
seq_printf
(
m
,
"processor
\t
: %d
\n
"
,
i
);
seq_printf
(
m
,
"cpu
\t\t
: "
);
if
(
cur_cpu_spec
[
i
]
->
pvr_mask
)
...
...
fs/proc/proc_devtree.c
View file @
a605a1cf
...
...
@@ -59,10 +59,13 @@ static void add_node(struct device_node *np, struct proc_dir_entry *de)
* Unfortunately proc_register puts each new entry
* at the beginning of the list. So we rearrange them.
*/
ent
=
create_proc_read_entry
(
pp
->
name
,
S_IRUGO
,
de
,
property_read_proc
,
pp
);
ent
=
create_proc_read_entry
(
pp
->
name
,
strncmp
(
pp
->
name
,
"security-"
,
9
)
?
S_IRUGO
:
S_IRUSR
,
de
,
property_read_proc
,
pp
);
if
(
ent
==
0
)
break
;
if
(
!
strncmp
(
pp
->
name
,
"security-"
,
9
))
ent
->
size
=
0
;
/* don't leak number of password chars */
else
ent
->
size
=
pp
->
length
;
*
lastp
=
ent
;
lastp
=
&
ent
->
next
;
...
...
include/asm-ppc/mpc10x.h
View file @
a605a1cf
...
...
@@ -121,7 +121,7 @@
#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c
/* Banks 4-7 */
#define MPC10X_MCTLR_MEM_END_1 0x90
/* Banks 0-3 */
#define MPC10X_MCTLR_MEM_END_2
i
0x94
/* Banks 4-7 */
#define MPC10X_MCTLR_MEM_END_2 0x94
/* Banks 4-7 */
#define MPC10X_MCTLR_EXT_MEM_END_1 0x98
/* Banks 0-3 */
#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c
/* Banks 4-7 */
...
...
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