Commit a629cf0a authored by Anirudh Venkataramanan's avatar Anirudh Venkataramanan Committed by Jeff Kirsher

ice: Update rings based on TC information

This patch adds a new function ice_vsi_cfg_dcb_rings which updates a
VSI's rings based on DCB traffic class information.
Signed-off-by: default avatarAnirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 00cc3f1b
...@@ -57,6 +57,44 @@ u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg) ...@@ -57,6 +57,44 @@ u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg)
return ret; return ret;
} }
/**
* ice_vsi_cfg_dcb_rings - Update rings to reflect DCB TC
* @vsi: VSI owner of rings being updated
*/
void ice_vsi_cfg_dcb_rings(struct ice_vsi *vsi)
{
struct ice_ring *tx_ring, *rx_ring;
u16 qoffset, qcount;
int i, n;
if (!test_bit(ICE_FLAG_DCB_ENA, vsi->back->flags)) {
/* Reset the TC information */
for (i = 0; i < vsi->num_txq; i++) {
tx_ring = vsi->tx_rings[i];
tx_ring->dcb_tc = 0;
}
for (i = 0; i < vsi->num_rxq; i++) {
rx_ring = vsi->rx_rings[i];
rx_ring->dcb_tc = 0;
}
return;
}
ice_for_each_traffic_class(n) {
if (!(vsi->tc_cfg.ena_tc & BIT(n)))
break;
qoffset = vsi->tc_cfg.tc_info[n].qoffset;
qcount = vsi->tc_cfg.tc_info[n].qcount_tx;
for (i = qoffset; i < (qoffset + qcount); i++) {
tx_ring = vsi->tx_rings[i];
rx_ring = vsi->rx_rings[i];
tx_ring->dcb_tc = n;
rx_ring->dcb_tc = n;
}
}
}
/** /**
* ice_pf_dcb_recfg - Reconfigure all VEBs and VSIs * ice_pf_dcb_recfg - Reconfigure all VEBs and VSIs
* @pf: pointer to the PF struct * @pf: pointer to the PF struct
......
...@@ -10,10 +10,16 @@ ...@@ -10,10 +10,16 @@
#ifdef CONFIG_DCB #ifdef CONFIG_DCB
u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg *dcbcfg); u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg *dcbcfg);
u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg); u8 ice_dcb_get_num_tc(struct ice_dcbx_cfg *dcbcfg);
void ice_vsi_cfg_dcb_rings(struct ice_vsi *vsi);
int ice_init_pf_dcb(struct ice_pf *pf); int ice_init_pf_dcb(struct ice_pf *pf);
void void
ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf, ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf,
struct ice_rq_event_info *event); struct ice_rq_event_info *event);
static inline void
ice_set_cgd_num(struct ice_tlan_ctx *tlan_ctx, struct ice_ring *ring)
{
tlan_ctx->cgd_num = ring->dcb_tc;
}
#else #else
static inline u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg __always_unused *dcbcfg) static inline u8 ice_dcb_get_ena_tc(struct ice_dcbx_cfg __always_unused *dcbcfg)
{ {
...@@ -31,6 +37,8 @@ static inline int ice_init_pf_dcb(struct ice_pf *pf) ...@@ -31,6 +37,8 @@ static inline int ice_init_pf_dcb(struct ice_pf *pf)
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
#define ice_vsi_cfg_dcb_rings(vsi) do {} while (0)
#define ice_dcb_process_lldp_set_mib_change(pf, event) do {} while (0) #define ice_dcb_process_lldp_set_mib_change(pf, event) do {} while (0)
#define ice_set_cgd_num(tlan_ctx, ring) do {} while (0)
#endif /* CONFIG_DCB */ #endif /* CONFIG_DCB */
#endif /* _ICE_DCB_LIB_H_ */ #endif /* _ICE_DCB_LIB_H_ */
...@@ -125,6 +125,8 @@ ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q) ...@@ -125,6 +125,8 @@ ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)
/* Transmit Queue Length */ /* Transmit Queue Length */
tlan_ctx->qlen = ring->count; tlan_ctx->qlen = ring->count;
ice_set_cgd_num(tlan_ctx, ring);
/* PF number */ /* PF number */
tlan_ctx->pf_num = hw->pf_id; tlan_ctx->pf_num = hw->pf_id;
......
...@@ -2940,6 +2940,7 @@ static int ice_vsi_cfg(struct ice_vsi *vsi) ...@@ -2940,6 +2940,7 @@ static int ice_vsi_cfg(struct ice_vsi *vsi)
if (err) if (err)
return err; return err;
} }
ice_vsi_cfg_dcb_rings(vsi);
err = ice_vsi_cfg_lan_txqs(vsi); err = ice_vsi_cfg_lan_txqs(vsi);
if (!err) if (!err)
......
...@@ -160,6 +160,9 @@ struct ice_ring { ...@@ -160,6 +160,9 @@ struct ice_ring {
}; };
u16 q_index; /* Queue number of ring */ u16 q_index; /* Queue number of ring */
u32 txq_teid; /* Added Tx queue TEID */ u32 txq_teid; /* Added Tx queue TEID */
#ifdef CONFIG_DCB
u8 dcb_tc; /* Traffic class of ring */
#endif /* CONFIG_DCB */
u16 count; /* Number of descriptors */ u16 count; /* Number of descriptors */
u16 reg_idx; /* HW register index of the ring */ u16 reg_idx; /* HW register index of the ring */
......
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