Commit a63e1c04 authored by Leon Huang's avatar Leon Huang Committed by Alex Deucher

drm/amd/display: Expand supported Replay residency mode

[Why]
Dmub provides several Replay residency calculation methods, but current
interface only supports either ALPM or PHY mode

[How]
Modify the interface for supporting different types of Replay residency
calculation.
Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarLeon Huang <Leon.Huang1@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a3324a67
...@@ -239,23 +239,39 @@ static void dmub_replay_set_coasting_vtotal(struct dmub_replay *dmub, ...@@ -239,23 +239,39 @@ static void dmub_replay_set_coasting_vtotal(struct dmub_replay *dmub,
* Get Replay residency from firmware. * Get Replay residency from firmware.
*/ */
static void dmub_replay_residency(struct dmub_replay *dmub, uint8_t panel_inst, static void dmub_replay_residency(struct dmub_replay *dmub, uint8_t panel_inst,
uint32_t *residency, const bool is_start, const bool is_alpm) uint32_t *residency, const bool is_start, enum pr_residency_mode mode)
{ {
struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub;
uint16_t param = (uint16_t)(panel_inst << 8); uint16_t param = (uint16_t)(panel_inst << 8);
if (is_alpm) switch (mode) {
case PR_RESIDENCY_MODE_PHY:
param |= REPLAY_RESIDENCY_FIELD_MODE_PHY;
break;
case PR_RESIDENCY_MODE_ALPM:
param |= REPLAY_RESIDENCY_FIELD_MODE_ALPM; param |= REPLAY_RESIDENCY_FIELD_MODE_ALPM;
break;
case PR_RESIDENCY_MODE_IPS2:
param |= REPLAY_RESIDENCY_REVISION_1;
param |= REPLAY_RESIDENCY_FIELD_MODE2_IPS;
break;
case PR_RESIDENCY_MODE_FRAME_CNT:
param |= REPLAY_RESIDENCY_REVISION_1;
param |= REPLAY_RESIDENCY_FIELD_MODE2_FRAME_CNT;
break;
case PR_RESIDENCY_MODE_ENABLEMENT_PERIOD:
param |= REPLAY_RESIDENCY_REVISION_1;
param |= REPLAY_RESIDENCY_FIELD_MODE2_EN_PERIOD;
break;
default:
break;
}
if (is_start) if (is_start)
param |= REPLAY_RESIDENCY_ENABLE; param |= REPLAY_RESIDENCY_ENABLE;
// Send gpint command and wait for ack // Send gpint command and wait for ack
dmub_srv_send_gpint_command(srv, DMUB_GPINT__REPLAY_RESIDENCY, param, 30); if (!dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__REPLAY_RESIDENCY, param,
residency, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))
if (!is_start)
dmub_srv_get_gpint_response(srv, residency);
else
*residency = 0; *residency = 0;
} }
......
...@@ -50,7 +50,7 @@ struct dmub_replay_funcs { ...@@ -50,7 +50,7 @@ struct dmub_replay_funcs {
void (*replay_set_coasting_vtotal)(struct dmub_replay *dmub, uint32_t coasting_vtotal, void (*replay_set_coasting_vtotal)(struct dmub_replay *dmub, uint32_t coasting_vtotal,
uint8_t panel_inst); uint8_t panel_inst);
void (*replay_residency)(struct dmub_replay *dmub, void (*replay_residency)(struct dmub_replay *dmub,
uint8_t panel_inst, uint32_t *residency, const bool is_start, const bool is_alpm); uint8_t panel_inst, uint32_t *residency, const bool is_start, const enum pr_residency_mode mode);
void (*replay_set_power_opt_and_coasting_vtotal)(struct dmub_replay *dmub, void (*replay_set_power_opt_and_coasting_vtotal)(struct dmub_replay *dmub,
unsigned int power_opt, uint8_t panel_inst, uint32_t coasting_vtotal); unsigned int power_opt, uint8_t panel_inst, uint32_t coasting_vtotal);
}; };
......
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