Commit a69ad111 authored by Miquel Raynal's avatar Miquel Raynal

mtd: rawnand: Get rid of the default ONFI timing mode

The ->choose_interface() hook is here for manufacturer drivers to
provide a better timing interface than the default one, this field is
not needed anymore.
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: default avatarBoris Brezillon <boris.brezillon@collabora.com>
Link: https://lore.kernel.org/linux-mtd/20200529111322.7184-28-miquel.raynal@bootlin.com
parent 6d469f86
...@@ -1012,10 +1012,8 @@ static int nand_setup_interface(struct nand_chip *chip, int chipnr) ...@@ -1012,10 +1012,8 @@ static int nand_setup_interface(struct nand_chip *chip, int chipnr)
* @iface: the interface configuration (can eventually be updated) * @iface: the interface configuration (can eventually be updated)
* @spec_timings: specific timings, when not fitting the ONFI specification * @spec_timings: specific timings, when not fitting the ONFI specification
* *
* If specific timings are provided, use them. Otherwise, try to retrieve * If specific timings are provided, use them. Otherwise, retrieve supported
* supported timing modes from ONFI information. Finally, if the NAND chip does * timing modes from ONFI information.
* not follow the ONFI specification, rely on the ->default_timing_mode
* specified in the nand_ids table.
*/ */
int nand_choose_best_sdr_timings(struct nand_chip *chip, int nand_choose_best_sdr_timings(struct nand_chip *chip,
struct nand_interface_config *iface, struct nand_interface_config *iface,
...@@ -1038,15 +1036,8 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, ...@@ -1038,15 +1036,8 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip,
/* Fallback to slower modes */ /* Fallback to slower modes */
best_mode = iface->timings.mode; best_mode = iface->timings.mode;
} else { } else if (chip->parameters.onfi) {
if (chip->parameters.onfi) { best_mode = fls(chip->parameters.onfi->async_timing_mode) - 1;
unsigned int onfi_modes;
onfi_modes = chip->parameters.onfi->async_timing_mode;
best_mode = fls(onfi_modes) - 1;
} else {
best_mode = chip->onfi_timing_mode_default;
}
} }
for (mode = best_mode; mode >= 0; mode--) { for (mode = best_mode; mode >= 0; mode--) {
...@@ -4767,8 +4758,6 @@ static bool find_full_id_nand(struct nand_chip *chip, ...@@ -4767,8 +4758,6 @@ static bool find_full_id_nand(struct nand_chip *chip,
chip->options |= type->options; chip->options |= type->options;
chip->base.eccreq.strength = NAND_ECC_STRENGTH(type); chip->base.eccreq.strength = NAND_ECC_STRENGTH(type);
chip->base.eccreq.step_size = NAND_ECC_STEP(type); chip->base.eccreq.step_size = NAND_ECC_STEP(type);
chip->onfi_timing_mode_default =
type->onfi_timing_mode_default;
chip->parameters.model = kstrdup(type->name, GFP_KERNEL); chip->parameters.model = kstrdup(type->name, GFP_KERNEL);
if (!chip->parameters.model) if (!chip->parameters.model)
......
...@@ -1069,9 +1069,6 @@ struct nand_manufacturer { ...@@ -1069,9 +1069,6 @@ struct nand_manufacturer {
* @options: Various chip options. They can partly be set to inform nand_scan * @options: Various chip options. They can partly be set to inform nand_scan
* about special functionality. See the defines for further * about special functionality. See the defines for further
* explanation. * explanation.
* @onfi_timing_mode_default: Default ONFI timing mode. This field is set to the
* actually used ONFI mode if the chip is ONFI
* compliant or deduced from the datasheet otherwise
* @interface_config: NAND interface timing information * @interface_config: NAND interface timing information
* @bbt_erase_shift: Number of address bits in a bbt entry * @bbt_erase_shift: Number of address bits in a bbt entry
* @bbt_options: Bad block table specific options. All options used here must * @bbt_options: Bad block table specific options. All options used here must
...@@ -1119,7 +1116,6 @@ struct nand_chip { ...@@ -1119,7 +1116,6 @@ struct nand_chip {
unsigned int options; unsigned int options;
/* Data interface */ /* Data interface */
int onfi_timing_mode_default;
struct nand_interface_config interface_config; struct nand_interface_config interface_config;
/* Bad block information */ /* Bad block information */
...@@ -1268,10 +1264,6 @@ nand_get_interface_config(struct nand_chip *chip) ...@@ -1268,10 +1264,6 @@ nand_get_interface_config(struct nand_chip *chip)
* @ecc_step_ds in nand_chip{}, also from the datasheet. * @ecc_step_ds in nand_chip{}, also from the datasheet.
* For example, the "4bit ECC for each 512Byte" can be set with * For example, the "4bit ECC for each 512Byte" can be set with
* NAND_ECC_INFO(4, 512). * NAND_ECC_INFO(4, 512).
* @onfi_timing_mode_default: the default ONFI timing mode entered after a NAND
* reset. Should be deduced from timings described
* in the datasheet.
*
*/ */
struct nand_flash_dev { struct nand_flash_dev {
char *name; char *name;
...@@ -1292,7 +1284,6 @@ struct nand_flash_dev { ...@@ -1292,7 +1284,6 @@ struct nand_flash_dev {
uint16_t strength_ds; uint16_t strength_ds;
uint16_t step_ds; uint16_t step_ds;
} ecc; } ecc;
int onfi_timing_mode_default;
}; };
int nand_create_bbt(struct nand_chip *chip); int nand_create_bbt(struct nand_chip *chip);
......
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