Commit a72f691a authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://gkernel.bkbits.net/netdev-2.6

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents f3c1e4cf 0fcd426d
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
* @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com> * @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
* @remark Copyright 2004 Intel Corporation * @remark Copyright 2004 Intel Corporation
* @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk> * @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
* @remark Copyright 2004 Oprofile Authors * @remark Copyright 2004 OProfile Authors
* *
* @remark Read the file COPYING * @remark Read the file COPYING
* *
...@@ -249,7 +249,7 @@ static int xscale_setup_ctrs(void) ...@@ -249,7 +249,7 @@ static int xscale_setup_ctrs(void)
int i; int i;
for (i = CCNT; i < MAX_COUNTERS; i++) { for (i = CCNT; i < MAX_COUNTERS; i++) {
if (counter_config[i].event) if (counter_config[i].enabled)
continue; continue;
counter_config[i].event = EVT_UNUSED; counter_config[i].event = EVT_UNUSED;
......
...@@ -97,10 +97,12 @@ static struct _cache_table cache_table[] __initdata = ...@@ -97,10 +97,12 @@ static struct _cache_table cache_table[] __initdata =
{ 0x70, LVL_TRACE, 12 }, { 0x70, LVL_TRACE, 12 },
{ 0x71, LVL_TRACE, 16 }, { 0x71, LVL_TRACE, 16 },
{ 0x72, LVL_TRACE, 32 }, { 0x72, LVL_TRACE, 32 },
{ 0x78, LVL_2, 1024 },
{ 0x79, LVL_2, 128 }, { 0x79, LVL_2, 128 },
{ 0x7a, LVL_2, 256 }, { 0x7a, LVL_2, 256 },
{ 0x7b, LVL_2, 512 }, { 0x7b, LVL_2, 512 },
{ 0x7c, LVL_2, 1024 }, { 0x7c, LVL_2, 1024 },
{ 0x7d, LVL_2, 2048 },
{ 0x82, LVL_2, 256 }, { 0x82, LVL_2, 256 },
{ 0x83, LVL_2, 512 }, { 0x83, LVL_2, 512 },
{ 0x84, LVL_2, 1024 }, { 0x84, LVL_2, 1024 },
......
...@@ -70,7 +70,7 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs) ...@@ -70,7 +70,7 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs)
/* enable active counters */ /* enable active counters */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < NUM_COUNTERS; ++i) {
if (counter_config[i].event) { if (counter_config[i].enabled) {
reset_value[i] = counter_config[i].count; reset_value[i] = counter_config[i].count;
CTR_WRITE(counter_config[i].count, msrs, i); CTR_WRITE(counter_config[i].count, msrs, i);
......
...@@ -578,7 +578,7 @@ static void p4_setup_ctrs(struct op_msrs const * const msrs) ...@@ -578,7 +578,7 @@ static void p4_setup_ctrs(struct op_msrs const * const msrs)
/* setup all counters */ /* setup all counters */
for (i = 0 ; i < num_counters ; ++i) { for (i = 0 ; i < num_counters ; ++i) {
if (counter_config[i].event) { if (counter_config[i].enabled) {
reset_value[i] = counter_config[i].count; reset_value[i] = counter_config[i].count;
pmc_setup_one_p4_counter(i); pmc_setup_one_p4_counter(i);
CTR_WRITE(counter_config[i].count, VIRT_CTR(stag, i)); CTR_WRITE(counter_config[i].count, VIRT_CTR(stag, i));
......
...@@ -67,7 +67,7 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) ...@@ -67,7 +67,7 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
/* enable active counters */ /* enable active counters */
for (i = 0; i < NUM_COUNTERS; ++i) { for (i = 0; i < NUM_COUNTERS; ++i) {
if (counter_config[i].event) { if (counter_config[i].enabled) {
reset_value[i] = counter_config[i].count; reset_value[i] = counter_config[i].count;
CTR_WRITE(counter_config[i].count, msrs, i); CTR_WRITE(counter_config[i].count, msrs, i);
......
...@@ -358,5 +358,5 @@ static inline unsigned nblocks(loff_t size) ...@@ -358,5 +358,5 @@ static inline unsigned nblocks(loff_t size)
res += blocks; res += blocks;
direct = 1; direct = 1;
} }
return blocks; return res;
} }
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