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Commit a8c4c20d authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm 

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 3541/2: workaround for PXA27x erratum E7
  [ARM] nommu: provide a way for correct control register value selection
  [ARM] 3705/1: add supersection support to ioremap()
  [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
  [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
  [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
  [ARM] 3703/1: Add help description for ARCH_EP80219
  [ARM] 3678/1: MMC: Make OMAP MMC work
  [ARM] 3677/1: OMAP: Update H2 defconfig
  [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
  [ARM] Add section support to ioremap
  [ARM] Fix sa11x0 SDRAM selection
  [ARM] Set bit 4 on section mappings correctly depending on CPU
  [ARM] 3666/1: TRIZEPS4 [1/5] core
  ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
  ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
  ARM: OMAP: Update dmtimers
  ARM: OMAP: Make clock variables static
  ARM: OMAP: Fix GPMC compilation when DEBUG is defined
  ARM: OMAP: Mux updates for external DMA and GPIO
  ...
parents 168d04b3 2dc7667b
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Showing with 5673 additions and 919 deletions
arch/arm/Kconfig
View file @ a8c4c20d
...@@ -121,11 +121,11 @@ config ARCH_VERSATILE ...@@ -121,11 +121,11 @@ config ARCH_VERSATILE
help help
This enables support for ARM Ltd Versatile board. This enables support for ARM Ltd Versatile board.
config ARCH_AT91RM9200 config ARCH_AT91
bool "Atmel AT91RM9200" bool "Atmel AT91"
help help
Say Y here if you intend to run this kernel on an Atmel This enables support for systems based on the Atmel AT91RM9200
AT91RM9200-based board. and AT91SAM9xxx processors.
config ARCH_CLPS7500 config ARCH_CLPS7500
bool "Cirrus CL-PS7500FE" bool "Cirrus CL-PS7500FE"
...@@ -547,7 +547,7 @@ config LEDS ...@@ -547,7 +547,7 @@ config LEDS
ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
ARCH_AT91RM9200 ARCH_AT91RM9200 || MACH_TRIZEPS4
help help
If you say Y here, the LEDs on your machine will be used If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status. to provide useful information about your current system status.
...@@ -678,7 +678,7 @@ config XIP_PHYS_ADDR ...@@ -678,7 +678,7 @@ config XIP_PHYS_ADDR
endmenu endmenu
if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1) if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP)
menu "CPU Frequency scaling" menu "CPU Frequency scaling"
......
arch/arm/Makefile
View file @ a8c4c20d
...@@ -114,7 +114,7 @@ endif ...@@ -114,7 +114,7 @@ endif
machine-$(CONFIG_ARCH_H720X) := h720x machine-$(CONFIG_ARCH_H720X) := h720x
machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
machine-$(CONFIG_ARCH_REALVIEW) := realview machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 machine-$(CONFIG_ARCH_AT91) := at91rm9200
machine-$(CONFIG_ARCH_EP93XX) := ep93xx machine-$(CONFIG_ARCH_EP93XX) := ep93xx
machine-$(CONFIG_ARCH_PNX4008) := pnx4008 machine-$(CONFIG_ARCH_PNX4008) := pnx4008
machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NETX) := netx
......
arch/arm/boot/compressed/head.S
View file @ a8c4c20d
...@@ -447,8 +447,11 @@ __common_mmu_cache_on: ...@@ -447,8 +447,11 @@ __common_mmu_cache_on:
mov r1, #-1 mov r1, #-1
mcr p15, 0, r3, c2, c0, 0 @ load page table pointer mcr p15, 0, r3, c2, c0, 0 @ load page table pointer
mcr p15, 0, r1, c3, c0, 0 @ load domain access control mcr p15, 0, r1, c3, c0, 0 @ load domain access control
mcr p15, 0, r0, c1, c0, 0 @ load control register b 1f
mov pc, lr .align 5 @ cache line aligned
1: mcr p15, 0, r0, c1, c0, 0 @ load control register
mrc p15, 0, r0, c1, c0, 0 @ and read it back to
sub pc, lr, r0, lsr #32 @ properly flush pipeline
/* /*
* All code following this line is relocatable. It is relocated by * All code following this line is relocatable. It is relocated by
......
arch/arm/configs/at91rm9200dk_defconfig
View file @ a8c4c20d
...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/at91rm9200ek_defconfig
View file @ a8c4c20d
...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/ateb9200_defconfig
View file @ a8c4c20d
...@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/carmeva_defconfig
View file @ a8c4c20d
...@@ -82,6 +82,7 @@ CONFIG_OBSOLETE_MODPARM=y ...@@ -82,6 +82,7 @@ CONFIG_OBSOLETE_MODPARM=y
# CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/csb337_defconfig
View file @ a8c4c20d
...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/csb637_defconfig
View file @ a8c4c20d
...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -103,6 +103,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/kafa_defconfig
View file @ a8c4c20d
...@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="deadline" ...@@ -105,6 +105,7 @@ CONFIG_DEFAULT_IOSCHED="deadline"
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/kb9202_defconfig
View file @ a8c4c20d
...@@ -80,6 +80,7 @@ CONFIG_KMOD=y ...@@ -80,6 +80,7 @@ CONFIG_KMOD=y
# CONFIG_ARCH_IMX is not set # CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set # CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set # CONFIG_ARCH_AAEC2000 is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# #
......
arch/arm/configs/omap_h2_1610_defconfig
View file @ a8c4c20d
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.14 # Linux kernel version: 2.6.17
# Wed Nov 9 18:53:40 2005 # Thu Jun 29 15:25:18 2006
# #
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_MMU=y CONFIG_MMU=y
CONFIG_UID16=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
# #
# Code maturity level options # Code maturity level options
# #
CONFIG_EXPERIMENTAL=y CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32 CONFIG_INIT_ENV_ARG_LIMIT=32
...@@ -29,26 +30,26 @@ CONFIG_SYSVIPC=y ...@@ -29,26 +30,26 @@ CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set # CONFIG_AUDIT is not set
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set # CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE="" CONFIG_INITRAMFS_SOURCE=""
CONFIG_UID16=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_EMBEDDED is not set # CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y CONFIG_PRINTK=y
CONFIG_BUG=y CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y CONFIG_BASE_FULL=y
CONFIG_FUTEX=y CONFIG_FUTEX=y
CONFIG_EPOLL=y CONFIG_EPOLL=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SHMEM=y CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0 CONFIG_SLAB=y
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set # CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0 CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
# #
# Loadable module support # Loadable module support
...@@ -56,7 +57,6 @@ CONFIG_BASE_SMALL=0 ...@@ -56,7 +57,6 @@ CONFIG_BASE_SMALL=0
CONFIG_MODULES=y CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set # CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set # CONFIG_KMOD is not set
...@@ -64,6 +64,7 @@ CONFIG_OBSOLETE_MODPARM=y ...@@ -64,6 +64,7 @@ CONFIG_OBSOLETE_MODPARM=y
# #
# Block layer # Block layer
# #
# CONFIG_BLK_DEV_IO_TRACE is not set
# #
# IO Schedulers # IO Schedulers
...@@ -81,16 +82,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -81,16 +82,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# #
# System Type # System Type
# #
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91RM9200 is not set
# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IOP3XX is not set
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set # CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set # CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_SA1100 is not set
...@@ -98,11 +109,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -98,11 +109,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_LH7A40X is not set
CONFIG_ARCH_OMAP=y CONFIG_ARCH_OMAP=y
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_AAEC2000 is not set
# #
# TI OMAP Implementations # TI OMAP Implementations
...@@ -141,6 +147,7 @@ CONFIG_ARCH_OMAP16XX=y ...@@ -141,6 +147,7 @@ CONFIG_ARCH_OMAP16XX=y
CONFIG_MACH_OMAP_H2=y CONFIG_MACH_OMAP_H2=y
# CONFIG_MACH_OMAP_H3 is not set # CONFIG_MACH_OMAP_H3 is not set
# CONFIG_MACH_OMAP_OSK is not set # CONFIG_MACH_OMAP_OSK is not set
# CONFIG_MACH_NOKIA770 is not set
# CONFIG_MACH_OMAP_GENERIC is not set # CONFIG_MACH_OMAP_GENERIC is not set
# #
...@@ -177,7 +184,6 @@ CONFIG_ARM_THUMB=y ...@@ -177,7 +184,6 @@ CONFIG_ARM_THUMB=y
# #
# Bus support # Bus support
# #
CONFIG_ISA_DMA_API=y
# #
# PCCARD (PCMCIA/CardBus) support # PCCARD (PCMCIA/CardBus) support
...@@ -189,6 +195,8 @@ CONFIG_ISA_DMA_API=y ...@@ -189,6 +195,8 @@ CONFIG_ISA_DMA_API=y
# #
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
CONFIG_NO_IDLE_HZ=y CONFIG_NO_IDLE_HZ=y
CONFIG_HZ=128
# CONFIG_AEABI is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
CONFIG_SELECT_MEMORY_MODEL=y CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM_MANUAL=y
...@@ -249,6 +257,8 @@ CONFIG_BINFMT_AOUT=y ...@@ -249,6 +257,8 @@ CONFIG_BINFMT_AOUT=y
# Power management options # Power management options
# #
CONFIG_PM=y CONFIG_PM=y
CONFIG_PM_LEGACY=y
# CONFIG_PM_DEBUG is not set
# CONFIG_APM is not set # CONFIG_APM is not set
# #
...@@ -259,9 +269,12 @@ CONFIG_NET=y ...@@ -259,9 +269,12 @@ CONFIG_NET=y
# #
# Networking options # Networking options
# #
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set # CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_NET_KEY is not set # CONFIG_NET_KEY is not set
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set # CONFIG_IP_MULTICAST is not set
...@@ -278,12 +291,18 @@ CONFIG_IP_PNP_BOOTP=y ...@@ -278,12 +291,18 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_AH is not set # CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set # CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set # CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set # CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_DIAG=y CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set # CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set # CONFIG_NETFILTER is not set
# #
...@@ -295,6 +314,11 @@ CONFIG_TCP_CONG_BIC=y ...@@ -295,6 +314,11 @@ CONFIG_TCP_CONG_BIC=y
# SCTP Configuration (EXPERIMENTAL) # SCTP Configuration (EXPERIMENTAL)
# #
# CONFIG_IP_SCTP is not set # CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set # CONFIG_ATM is not set
# CONFIG_BRIDGE is not set # CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set # CONFIG_VLAN_8021Q is not set
...@@ -312,7 +336,6 @@ CONFIG_TCP_CONG_BIC=y ...@@ -312,7 +336,6 @@ CONFIG_TCP_CONG_BIC=y
# QoS and/or fair queueing # QoS and/or fair queueing
# #
# CONFIG_NET_SCHED is not set # CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
# #
# Network testing # Network testing
...@@ -333,6 +356,12 @@ CONFIG_TCP_CONG_BIC=y ...@@ -333,6 +356,12 @@ CONFIG_TCP_CONG_BIC=y
CONFIG_STANDALONE=y CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
# #
# Memory Technology Devices (MTD) # Memory Technology Devices (MTD)
...@@ -526,6 +555,7 @@ CONFIG_SERIO_SERPORT=y ...@@ -526,6 +555,7 @@ CONFIG_SERIO_SERPORT=y
CONFIG_VT=y CONFIG_VT=y
CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
# CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_SERIAL_NONSTANDARD is not set
# #
...@@ -534,6 +564,7 @@ CONFIG_HW_CONSOLE=y ...@@ -534,6 +564,7 @@ CONFIG_HW_CONSOLE=y
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set # CONFIG_SERIAL_8250_EXTENDED is not set
# #
...@@ -559,8 +590,8 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -559,8 +590,8 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# Watchdog Device Drivers # Watchdog Device Drivers
# #
# CONFIG_SOFT_WATCHDOG is not set # CONFIG_SOFT_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set # CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set # CONFIG_DTLK is not set
# CONFIG_R3964 is not set # CONFIG_R3964 is not set
...@@ -572,6 +603,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -572,6 +603,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# #
# TPM devices # TPM devices
# #
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set # CONFIG_TELCLOCK is not set
# #
...@@ -579,11 +611,23 @@ CONFIG_WATCHDOG_NOWAYOUT=y ...@@ -579,11 +611,23 @@ CONFIG_WATCHDOG_NOWAYOUT=y
# #
# CONFIG_I2C is not set # CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# #
# Hardware Monitoring support # Hardware Monitoring support
# #
CONFIG_HWMON=y CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set # CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_HWMON_DEBUG_CHIP is not set # CONFIG_HWMON_DEBUG_CHIP is not set
# #
...@@ -591,13 +635,23 @@ CONFIG_HWMON=y ...@@ -591,13 +635,23 @@ CONFIG_HWMON=y
# #
# #
# Multimedia Capabilities Port drivers # LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
# #
# #
# Multimedia devices # Multimedia devices
# #
# CONFIG_VIDEO_DEV is not set # CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
# #
# Digital Video Broadcasting Devices # Digital Video Broadcasting Devices
...@@ -607,11 +661,13 @@ CONFIG_HWMON=y ...@@ -607,11 +661,13 @@ CONFIG_HWMON=y
# #
# Graphics support # Graphics support
# #
CONFIG_FIRMWARE_EDID=y
CONFIG_FB=y CONFIG_FB=y
# CONFIG_FB_CFB_FILLRECT is not set # CONFIG_FB_CFB_FILLRECT is not set
# CONFIG_FB_CFB_COPYAREA is not set # CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set # CONFIG_FB_CFB_IMAGEBLIT is not set
# CONFIG_FB_MACMODES is not set # CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
CONFIG_FB_MODE_HELPERS=y CONFIG_FB_MODE_HELPERS=y
# CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_S1D13XXX is not set # CONFIG_FB_S1D13XXX is not set
...@@ -635,7 +691,6 @@ CONFIG_FONT_8x16=y ...@@ -635,7 +691,6 @@ CONFIG_FONT_8x16=y
# CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_10x18 is not set # CONFIG_FONT_10x18 is not set
# CONFIG_FONT_RL is not set
# #
# Logo configuration # Logo configuration
...@@ -660,16 +715,15 @@ CONFIG_SOUND=y ...@@ -660,16 +715,15 @@ CONFIG_SOUND=y
# Open Sound System # Open Sound System
# #
CONFIG_SOUND_PRIME=y CONFIG_SOUND_PRIME=y
# CONFIG_OBSOLETE_OSS_DRIVER is not set
# CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set # CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_OSS is not set
# #
# USB support # USB support
# #
CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_ARCH_HAS_EHCI is not set
# CONFIG_USB is not set # CONFIG_USB is not set
# #
...@@ -680,23 +734,18 @@ CONFIG_USB_ARCH_HAS_OHCI=y ...@@ -680,23 +734,18 @@ CONFIG_USB_ARCH_HAS_OHCI=y
# USB Gadget Support # USB Gadget Support
# #
# CONFIG_USB_GADGET is not set # CONFIG_USB_GADGET is not set
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_GOKU is not set
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
# CONFIG_USB_GADGETFS is not set
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
# #
# MMC/SD Card support # MMC/SD Card support
# #
# CONFIG_MMC is not set # CONFIG_MMC is not set
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
# #
# File systems # File systems
# #
...@@ -704,14 +753,15 @@ CONFIG_EXT2_FS=y ...@@ -704,14 +753,15 @@ CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set # CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set # CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set # CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set # CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set # CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=y CONFIG_ROMFS_FS=y
CONFIG_INOTIFY=y CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set # CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS_FS is not set
...@@ -741,7 +791,7 @@ CONFIG_SYSFS=y ...@@ -741,7 +791,7 @@ CONFIG_SYSFS=y
# CONFIG_TMPFS is not set # CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set # CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y CONFIG_RAMFS=y
# CONFIG_RELAYFS_FS is not set # CONFIG_CONFIGFS_FS is not set
# #
# Miscellaneous filesystems # Miscellaneous filesystems
...@@ -843,10 +893,13 @@ CONFIG_NLS_DEFAULT="iso8859-1" ...@@ -843,10 +893,13 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# Kernel hacking # Kernel hacking
# #
# CONFIG_PRINTK_TIME is not set # CONFIG_PRINTK_TIME is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_KERNEL is not set # CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y CONFIG_FRAME_POINTER=y
# CONFIG_UNWIND_INFO is not set
# CONFIG_DEBUG_USER is not set # CONFIG_DEBUG_USER is not set
# #
......
arch/arm/configs/onearm_defconfig
View file @ a8c4c20d
...@@ -85,6 +85,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" ...@@ -85,6 +85,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_VERSATILE is not set
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y CONFIG_ARCH_AT91RM9200=y
# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CLPS711X is not set
......
arch/arm/configs/trizeps4_defconfig 0 → 100644
View file @ a8c4c20d
This diff is collapsed.
arch/arm/kernel/Makefile
View file @ a8c4c20d
...@@ -25,7 +25,7 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o ...@@ -25,7 +25,7 @@ obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_IWMMXT) += iwmmxt.o iwmmxt-notifier.o
AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
ifneq ($(CONFIG_ARCH_EBSA110),y) ifneq ($(CONFIG_ARCH_EBSA110),y)
......
arch/arm/kernel/asm-offsets.c
View file @ a8c4c20d
...@@ -105,6 +105,7 @@ int main(void) ...@@ -105,6 +105,7 @@ int main(void)
BLANK(); BLANK();
DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list)); DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush)); DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
DEFINE(PROCINFO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mmu_flags)); DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
return 0; return 0;
} }
arch/arm/kernel/entry-armv.S
View file @ a8c4c20d
...@@ -589,9 +589,7 @@ ENTRY(__switch_to) ...@@ -589,9 +589,7 @@ ENTRY(__switch_to)
#ifdef CONFIG_MMU #ifdef CONFIG_MMU
mcr p15, 0, r6, c3, c0, 0 @ Set domain register mcr p15, 0, r6, c3, c0, 0 @ Set domain register
#endif #endif
#if defined(CONFIG_IWMMXT) #if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT)
bl iwmmxt_task_switch
#elif defined(CONFIG_CPU_XSCALE)
add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra add r4, r2, #TI_CPU_DOMAIN + 40 @ cpu_context_save->extra
ldmib r4, {r4, r5} ldmib r4, {r4, r5}
mar acc0, r4, r5 mar acc0, r4, r5
......
arch/arm/kernel/head.S
View file @ a8c4c20d
...@@ -220,7 +220,7 @@ __create_page_tables: ...@@ -220,7 +220,7 @@ __create_page_tables:
teq r0, r6 teq r0, r6
bne 1b bne 1b
ldr r7, [r10, #PROCINFO_MMUFLAGS] @ mmuflags ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
/* /*
* Create identity mapping for first MB of kernel to * Create identity mapping for first MB of kernel to
...@@ -271,8 +271,7 @@ __create_page_tables: ...@@ -271,8 +271,7 @@ __create_page_tables:
#endif #endif
#ifdef CONFIG_DEBUG_LL #ifdef CONFIG_DEBUG_LL
bic r7, r7, #0x0c @ turn off cacheable ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
@ and bufferable bits
/* /*
* Map in IO space for serial debugging. * Map in IO space for serial debugging.
* This allows debug messages to be output * This allows debug messages to be output
......
arch/arm/kernel/iwmmxt-notifier.c 0 → 100644
View file @ a8c4c20d
/*
* linux/arch/arm/kernel/iwmmxt-notifier.c
*
* XScale iWMMXt (Concan) context switching and handling
*
* Initial code:
* Copyright (c) 2003, Intel Corporation
*
* Full lazy switching support, optimizations and more, by Nicolas Pitre
* Copyright (c) 2003-2004, MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <asm/thread_notify.h>
#include <asm/io.h>
static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
{
struct thread_info *thread = t;
switch (cmd) {
case THREAD_NOTIFY_FLUSH:
/*
* flush_thread() zeroes thread->fpstate, so no need
* to do anything here.
*
* FALLTHROUGH: Ensure we don't try to overwrite our newly
* initialised state information on the first fault.
*/
case THREAD_NOTIFY_RELEASE:
iwmmxt_task_release(thread);
break;
case THREAD_NOTIFY_SWITCH:
iwmmxt_task_switch(thread);
break;
}
return NOTIFY_DONE;
}
static struct notifier_block iwmmxt_notifier_block = {
.notifier_call = iwmmxt_do,
};
static int __init iwmmxt_init(void)
{
thread_register_notifier(&iwmmxt_notifier_block);
return 0;
}
late_initcall(iwmmxt_init);
arch/arm/kernel/iwmmxt.S
View file @ a8c4c20d
...@@ -271,30 +271,27 @@ ENTRY(iwmmxt_task_restore) ...@@ -271,30 +271,27 @@ ENTRY(iwmmxt_task_restore)
/* /*
* Concan handling on task switch * Concan handling on task switch
* *
* r0 = previous task_struct pointer (must be preserved) * r0 = next thread_info pointer
* r1 = previous thread_info pointer
* r2 = next thread_info pointer (must be preserved)
* *
* Called only from __switch_to with task preemption disabled. * Called only from the iwmmxt notifier with task preemption disabled.
* No need to care about preserving r4 and above.
*/ */
ENTRY(iwmmxt_task_switch) ENTRY(iwmmxt_task_switch)
mrc p15, 0, r4, c15, c1, 0 mrc p15, 0, r1, c15, c1, 0
tst r4, #0x3 @ CP0 and CP1 accessible? tst r1, #0x3 @ CP0 and CP1 accessible?
bne 1f @ yes: block them for next task bne 1f @ yes: block them for next task
ldr r5, =concan_owner ldr r2, =concan_owner
add r6, r2, #TI_IWMMXT_STATE @ get next task Concan save area add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area
ldr r5, [r5] @ get current Concan owner ldr r2, [r2] @ get current Concan owner
teq r5, r6 @ next task owns it? teq r2, r3 @ next task owns it?
movne pc, lr @ no: leave Concan disabled movne pc, lr @ no: leave Concan disabled
1: eor r4, r4, #3 @ flip Concan access 1: eor r1, r1, #3 @ flip Concan access
mcr p15, 0, r4, c15, c1, 0 mcr p15, 0, r1, c15, c1, 0
mrc p15, 0, r4, c2, c0, 0 mrc p15, 0, r1, c2, c0, 0
sub pc, lr, r4, lsr #32 @ cpwait and return sub pc, lr, r1, lsr #32 @ cpwait and return
/* /*
* Remove Concan ownership of given task * Remove Concan ownership of given task
......
arch/arm/kernel/process.c
View file @ a8c4c20d
...@@ -352,9 +352,6 @@ void flush_thread(void) ...@@ -352,9 +352,6 @@ void flush_thread(void)
memset(&thread->fpstate, 0, sizeof(union fp_state)); memset(&thread->fpstate, 0, sizeof(union fp_state));
thread_notify(THREAD_NOTIFY_FLUSH, thread); thread_notify(THREAD_NOTIFY_FLUSH, thread);
#if defined(CONFIG_IWMMXT)
iwmmxt_task_release(thread);
#endif
} }
void release_thread(struct task_struct *dead_task) void release_thread(struct task_struct *dead_task)
...@@ -362,9 +359,6 @@ void release_thread(struct task_struct *dead_task) ...@@ -362,9 +359,6 @@ void release_thread(struct task_struct *dead_task)
struct thread_info *thread = task_thread_info(dead_task); struct thread_info *thread = task_thread_info(dead_task);
thread_notify(THREAD_NOTIFY_RELEASE, thread); thread_notify(THREAD_NOTIFY_RELEASE, thread);
#if defined(CONFIG_IWMMXT)
iwmmxt_task_release(thread);
#endif
} }
asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
......
arch/arm/kernel/setup.c
View file @ a8c4c20d
...@@ -344,9 +344,9 @@ static void __init setup_processor(void) ...@@ -344,9 +344,9 @@ static void __init setup_processor(void)
cpu_cache = *list->cache; cpu_cache = *list->cache;
#endif #endif
printk("CPU: %s [%08x] revision %d (ARMv%s)\n", printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
cpu_name, processor_id, (int)processor_id & 15, cpu_name, processor_id, (int)processor_id & 15,
proc_arch[cpu_architecture()]); proc_arch[cpu_architecture()], cr_alignment);
sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS); sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS); sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
......
arch/arm/mach-at91rm9200/Kconfig
View file @ a8c4c20d
if ARCH_AT91RM9200 if ARCH_AT91
menu "Atmel AT91 System-on-Chip"
comment "Atmel AT91 Processors"
config ARCH_AT91RM9200
bool "AT91RM9200"
menu "AT91RM9200 Implementations" config ARCH_AT91SAM9260
bool "AT91SAM9260"
config ARCH_AT91SAM9261
bool "AT91SAM9261"
# ----------------------------------------------------------
if ARCH_AT91RM9200
comment "AT91RM9200 Board Type" comment "AT91RM9200 Board Type"
...@@ -8,58 +23,87 @@ config MACH_ONEARM ...@@ -8,58 +23,87 @@ config MACH_ONEARM
bool "Ajeco 1ARM Single Board Computer" bool "Ajeco 1ARM Single Board Computer"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Ajeco's 1ARM Single Board Computer Select this if you are using Ajeco's 1ARM Single Board Computer.
<http://www.ajeco.fi/products.htm>
config ARCH_AT91RM9200DK config ARCH_AT91RM9200DK
bool "Atmel AT91RM9200-DK Development board" bool "Atmel AT91RM9200-DK Development board"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Atmel's AT91RM9200-DK Development board Select this if you are using Atmel's AT91RM9200-DK Development board.
(Discontinued)
config MACH_AT91RM9200EK config MACH_AT91RM9200EK
bool "Atmel AT91RM9200-EK Evaluation Kit" bool "Atmel AT91RM9200-EK Evaluation Kit"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
<http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
config MACH_CSB337 config MACH_CSB337
bool "Cogent CSB337 board" bool "Cogent CSB337"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Cogent's CSB337 board Select this if you are using Cogent's CSB337 board.
<http://www.cogcomp.com/csb_csb337.htm>
config MACH_CSB637 config MACH_CSB637
bool "Cogent CSB637 board" bool "Cogent CSB637"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Cogent's CSB637 board Select this if you are using Cogent's CSB637 board.
<http://www.cogcomp.com/csb_csb637.htm>
config MACH_CARMEVA config MACH_CARMEVA
bool "Conitec's ARM&EVA" bool "Conitec ARM&EVA"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Conitec's AT91RM9200-MCU-Module Select this if you are using Conitec's AT91RM9200-MCU-Module.
<http://www.conitec.net/english/linuxboard.htm>
config MACH_KB9200 config MACH_ATEB9200
bool "KwikByte's KB920x" bool "Embest ATEB9200"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using KwikByte's KB920x board Select this if you are using Embest's ATEB9200 board.
<http://www.embedinfo.com/english/product/ATEB9200.asp>
config MACH_ATEB9200 config MACH_KB9200
bool "Embest's ATEB9200" bool "KwikByte KB920x"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Embest's ATEB9200 board Select this if you are using KwikByte's KB920x board.
<http://kwikbyte.com/KB9202_description_new.htm>
config MACH_KAFA config MACH_KAFA
bool "Sperry-Sun KAFA board" bool "Sperry-Sun KAFA board"
depends on ARCH_AT91RM9200 depends on ARCH_AT91RM9200
help help
Select this if you are using Sperry-Sun's KAFA board Select this if you are using Sperry-Sun's KAFA board.
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9260
comment "AT91SAM9260 Board Type"
endif
# ----------------------------------------------------------
if ARCH_AT91SAM9261
comment "AT91SAM9261 Board Type"
endif
# ----------------------------------------------------------
comment "AT91RM9200 Feature Selections" comment "AT91 Feature Selections"
config AT91_PROGRAMMABLE_CLOCKS config AT91_PROGRAMMABLE_CLOCKS
bool "Programmable Clocks" bool "Programmable Clocks"
......
arch/arm/mach-at91rm9200/Makefile
View file @ a8c4c20d
...@@ -2,14 +2,19 @@ ...@@ -2,14 +2,19 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
obj-y := clock.o irq.o time.o gpio.o common.o devices.o obj-y := clock.o irq.o gpio.o devices.o
obj-m := obj-m :=
obj-n := obj-n :=
obj- := obj- :=
obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += pm.o
# Board-specific support # CPU-specific support
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o
obj-$(CONFIG_ARCH_AT91SAM9260) +=
obj-$(CONFIG_ARCH_AT91SAM9261) +=
# AT91RM9200 Board-specific support
obj-$(CONFIG_MACH_ONEARM) += board-1arm.o obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o obj-$(CONFIG_ARCH_AT91RM9200DK) += board-dk.o
obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o obj-$(CONFIG_MACH_AT91RM9200EK) += board-ek.o
...@@ -20,6 +25,10 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o ...@@ -20,6 +25,10 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
obj-$(CONFIG_MACH_KAFA) += board-kafa.o obj-$(CONFIG_MACH_KAFA) += board-kafa.o
# AT91SAM9260 board-specific support
# AT91SAM9261 board-specific support
# LEDs support # LEDs support
led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
led-$(CONFIG_MACH_AT91RM9200EK) += leds.o led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
......
arch/arm/mach-at91rm9200/common.c → arch/arm/mach-at91rm9200/at91rm9200.c
View file @ a8c4c20d
/* /*
* arch/arm/mach-at91rm9200/common.c * arch/arm/mach-at91rm9200/at91rm9200.c
* *
* Copyright (C) 2005 SAN People * Copyright (C) 2005 SAN People
* *
......
arch/arm/mach-at91rm9200/time.c → arch/arm/mach-at91rm9200/at91rm9200_time.c
View file @ a8c4c20d
/* /*
* linux/arch/arm/mach-at91rm9200/time.c * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c
* *
* Copyright (C) 2003 SAN People * Copyright (C) 2003 SAN People
* Copyright (C) 2003 ATMEL * Copyright (C) 2003 ATMEL
......
arch/arm/mach-ep93xx/Kconfig
View file @ a8c4c20d
...@@ -9,12 +9,24 @@ config CRUNCH ...@@ -9,12 +9,24 @@ config CRUNCH
comment "EP93xx Platforms" comment "EP93xx Platforms"
config MACH_EDB9302
bool "Support Cirrus Logic EDB9302"
help
Say 'Y' here if you want your kernel to support the Cirrus
Logic EDB9302 Evaluation Board.
config MACH_EDB9315 config MACH_EDB9315
bool "Support Cirrus Logic EDB9315" bool "Support Cirrus Logic EDB9315"
help help
Say 'Y' here if you want your kernel to support the Cirrus Say 'Y' here if you want your kernel to support the Cirrus
Logic EDB9315 Evaluation Board. Logic EDB9315 Evaluation Board.
config MACH_EDB9315A
bool "Support Cirrus Logic EDB9315A"
help
Say 'Y' here if you want your kernel to support the Cirrus
Logic EDB9315A Evaluation Board.
config MACH_GESBC9312 config MACH_GESBC9312
bool "Support Glomation GESBC-9312-sx" bool "Support Glomation GESBC-9312-sx"
help help
......
arch/arm/mach-ep93xx/Makefile
View file @ a8c4c20d
...@@ -6,6 +6,8 @@ obj-m := ...@@ -6,6 +6,8 @@ obj-m :=
obj-n := obj-n :=
obj- := obj- :=
obj-$(CONFIG_MACH_EDB9302) += edb9302.o
obj-$(CONFIG_MACH_EDB9315) += edb9315.o obj-$(CONFIG_MACH_EDB9315) += edb9315.o
obj-$(CONFIG_MACH_EDB9315A) += edb9315a.o
obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
obj-$(CONFIG_MACH_TS72XX) += ts72xx.o obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
arch/arm/mach-ep93xx/edb9302.c 0 → 100644
View file @ a8c4c20d
/*
* arch/arm/mach-ep93xx/edb9302.c
* Cirrus Logic EDB9302 support.
*
* Copyright (C) 2006 George Kashperko <george@chas.com.ua>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static struct physmap_flash_data edb9302_flash_data = {
.width = 2,
};
static struct resource edb9302_flash_resource = {
.start = 0x60000000,
.end = 0x60ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device edb9302_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &edb9302_flash_data,
},
.num_resources = 1,
.resource = &edb9302_flash_resource,
};
static void __init edb9302_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9302_flash);
}
MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
/* Maintainer: George Kashperko <george@chas.com.ua> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = edb9302_init_machine,
MACHINE_END
arch/arm/mach-ep93xx/edb9315a.c 0 → 100644
View file @ a8c4c20d
/*
* arch/arm/mach-ep93xx/edb9315a.c
* Cirrus Logic EDB9315A support.
*
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static struct physmap_flash_data edb9315a_flash_data = {
.width = 2,
};
static struct resource edb9315a_flash_resource = {
.start = 0x60000000,
.end = 0x60ffffff,
.flags = IORESOURCE_MEM,
};
static struct platform_device edb9315a_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &edb9315a_flash_data,
},
.num_resources = 1,
.resource = &edb9315a_flash_resource,
};
static void __init edb9315a_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9315a_flash);
}
MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
.phys_io = EP93XX_APB_PHYS_BASE,
.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0xc0000100,
.map_io = ep93xx_map_io,
.init_irq = ep93xx_init_irq,
.timer = &ep93xx_timer,
.init_machine = edb9315a_init_machine,
MACHINE_END
arch/arm/mach-iop3xx/Kconfig
View file @ a8c4c20d
...@@ -30,12 +30,15 @@ config MACH_IQ80332 ...@@ -30,12 +30,15 @@ config MACH_IQ80332
select ARCH_IOP331 select ARCH_IOP331
help help
Say Y here if you want to run your kernel on the Intel IQ80332 Say Y here if you want to run your kernel on the Intel IQ80332
evaluation kit for the IOP332 chipset evaluation kit for the IOP332 chipset.
config ARCH_EP80219 config ARCH_EP80219
bool "Enable support for EP80219" bool "Enable support for EP80219"
select ARCH_IOP321 select ARCH_IOP321
select ARCH_IQ31244 select ARCH_IQ31244
help
Say Y here if you want to run your kernel on the Intel EP80219
evaluation kit for the Intel 80219 chipset (a IOP321 variant).
# Which IOP variant are we running? # Which IOP variant are we running?
config ARCH_IOP321 config ARCH_IOP321
...@@ -56,8 +59,8 @@ config IOP331_STEPD ...@@ -56,8 +59,8 @@ config IOP331_STEPD
bool "Chip stepping D of the IOP80331 processor or IOP80333" bool "Chip stepping D of the IOP80331 processor or IOP80333"
depends on (ARCH_IOP331) depends on (ARCH_IOP331)
help help
Say Y here if you have StepD of the IOP80331 or IOP8033 Say Y here if you have StepD of the IOP80331 or IOP8033
based platforms. based platforms.
endmenu endmenu
endif endif
arch/arm/mach-omap1/Kconfig
View file @ a8c4c20d
...@@ -62,6 +62,13 @@ config MACH_OMAP_PERSEUS2 ...@@ -62,6 +62,13 @@ config MACH_OMAP_PERSEUS2
Support for TI OMAP 730 Perseus2 board. Say Y here if you have such Support for TI OMAP 730 Perseus2 board. Say Y here if you have such
a board. a board.
config MACH_OMAP_FSAMPLE
bool "TI F-Sample"
depends on ARCH_OMAP1 && ARCH_OMAP730
help
Support for TI OMAP 850 F-Sample board. Say Y here if you have such
a board.
config MACH_VOICEBLUE config MACH_VOICEBLUE
bool "Voiceblue" bool "Voiceblue"
depends on ARCH_OMAP1 && ARCH_OMAP15XX depends on ARCH_OMAP1 && ARCH_OMAP15XX
......
arch/arm/mach-omap1/Makefile
View file @ a8c4c20d
...@@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o ...@@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_OMAP_H2) += board-h2.o
obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o obj-$(CONFIG_MACH_OMAP_INNOVATOR) += board-innovator.o
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o obj-$(CONFIG_MACH_OMAP_PERSEUS2) += board-perseus2.o
obj-$(CONFIG_MACH_OMAP_FSAMPLE) += board-fsample.o
obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o obj-$(CONFIG_MACH_OMAP_OSK) += board-osk.o
obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o obj-$(CONFIG_MACH_OMAP_H3) += board-h3.o
obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o obj-$(CONFIG_MACH_VOICEBLUE) += board-voiceblue.o
......
arch/arm/mach-omap1/board-ams-delta.c
View file @ a8c4c20d
...@@ -80,8 +80,15 @@ static struct omap_uart_config ams_delta_uart_config __initdata = { ...@@ -80,8 +80,15 @@ static struct omap_uart_config ams_delta_uart_config __initdata = {
.enabled_uarts = 1, .enabled_uarts = 1,
}; };
static struct omap_usb_config ams_delta_usb_config __initdata = {
.register_host = 1,
.hmc_mode = 16,
.pins[0] = 2,
};
static struct omap_board_config_kernel ams_delta_config[] = { static struct omap_board_config_kernel ams_delta_config[] = {
{ OMAP_TAG_UART, &ams_delta_uart_config }, { OMAP_TAG_UART, &ams_delta_uart_config },
{ OMAP_TAG_USB, &ams_delta_usb_config },
}; };
static struct platform_device ams_delta_led_device = { static struct platform_device ams_delta_led_device = {
......
arch/arm/mach-omap1/board-fsample.c 0 → 100644
View file @ a8c4c20d
/*
* linux/arch/arm/mach-omap1/board-fsample.c
*
* Modified from board-perseus2.c
*
* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>
#include <asm/arch/tc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mux.h>
#include <asm/arch/fpga.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h>
#include <asm/arch/board.h>
#include <asm/arch/board-fsample.h>
static int fsample_keymap[] = {
KEY(0,0,KEY_UP),
KEY(0,1,KEY_RIGHT),
KEY(0,2,KEY_LEFT),
KEY(0,3,KEY_DOWN),
KEY(0,4,KEY_CENTER),
KEY(0,5,KEY_0_5),
KEY(1,0,KEY_SOFT2),
KEY(1,1,KEY_SEND),
KEY(1,2,KEY_END),
KEY(1,3,KEY_VOLUMEDOWN),
KEY(1,4,KEY_VOLUMEUP),
KEY(1,5,KEY_RECORD),
KEY(2,0,KEY_SOFT1),
KEY(2,1,KEY_3),
KEY(2,2,KEY_6),
KEY(2,3,KEY_9),
KEY(2,4,KEY_SHARP),
KEY(2,5,KEY_2_5),
KEY(3,0,KEY_BACK),
KEY(3,1,KEY_2),
KEY(3,2,KEY_5),
KEY(3,3,KEY_8),
KEY(3,4,KEY_0),
KEY(3,5,KEY_HEADSETHOOK),
KEY(4,0,KEY_HOME),
KEY(4,1,KEY_1),
KEY(4,2,KEY_4),
KEY(4,3,KEY_7),
KEY(4,4,KEY_STAR),
KEY(4,5,KEY_POWER),
0
};
static struct resource smc91x_resources[] = {
[0] = {
.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = INT_730_MPU_EXT_NIRQ,
.end = 0,
.flags = IORESOURCE_IRQ,
},
};
static struct mtd_partition nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
{
.name = "bootloader",
.offset = 0,
.size = SZ_128K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
/* bootloader params in the next sector */
{
.name = "params",
.offset = MTDPART_OFS_APPEND,
.size = SZ_128K,
.mask_flags = 0,
},
/* kernel */
{
.name = "kernel",
.offset = MTDPART_OFS_APPEND,
.size = SZ_2M,
.mask_flags = 0
},
/* rest of flash is a file system */
{
.name = "rootfs",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
.mask_flags = 0
},
};
static struct flash_platform_data nor_data = {
.map_name = "cfi_probe",
.width = 2,
.parts = nor_partitions,
.nr_parts = ARRAY_SIZE(nor_partitions),
};
static struct resource nor_resource = {
.start = OMAP_CS0_PHYS,
.end = OMAP_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device nor_device = {
.name = "omapflash",
.id = 0,
.dev = {
.platform_data = &nor_data,
},
.num_resources = 1,
.resource = &nor_resource,
};
static struct nand_platform_data nand_data = {
.options = NAND_SAMSUNG_LP_OPTIONS,
};
static struct resource nand_resource = {
.start = OMAP_CS3_PHYS,
.end = OMAP_CS3_PHYS + SZ_4K - 1,
.flags = IORESOURCE_MEM,
};
static struct platform_device nand_device = {
.name = "omapnand",
.id = 0,
.dev = {
.platform_data = &nand_data,
},
.num_resources = 1,
.resource = &nand_resource,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
};
static struct resource kp_resources[] = {
[0] = {
.start = INT_730_MPUIO_KEYPAD,
.end = INT_730_MPUIO_KEYPAD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data kp_data = {
.rows = 8,
.cols = 8,
.keymap = fsample_keymap,
};
static struct platform_device kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &kp_data,
},
.num_resources = ARRAY_SIZE(kp_resources),
.resource = kp_resources,
};
static struct platform_device lcd_device = {
.name = "lcd_p2",
.id = -1,
};
static struct platform_device *devices[] __initdata = {
&nor_device,
&nand_device,
&smc91x_device,
&kp_device,
&lcd_device,
};
#define P2_NAND_RB_GPIO_PIN 62
static int nand_dev_ready(struct nand_platform_data *data)
{
return omap_get_gpio_datain(P2_NAND_RB_GPIO_PIN);
}
static struct omap_uart_config fsample_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1)),
};
static struct omap_lcd_config fsample_lcd_config __initdata = {
.ctrl_name = "internal",
};
static struct omap_board_config_kernel fsample_config[] = {
{ OMAP_TAG_UART, &fsample_uart_config },
{ OMAP_TAG_LCD, &fsample_lcd_config },
};
static void __init omap_fsample_init(void)
{
if (!(omap_request_gpio(P2_NAND_RB_GPIO_PIN)))
nand_data.dev_ready = nand_dev_ready;
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
platform_add_devices(devices, ARRAY_SIZE(devices));
omap_board_config = fsample_config;
omap_board_config_size = ARRAY_SIZE(fsample_config);
omap_serial_init();
}
static void __init fsample_init_smc91x(void)
{
fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
mdelay(50);
fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
H2P2_DBG_FPGA_LAN_RESET);
mdelay(50);
}
void omap_fsample_init_irq(void)
{
omap1_init_common_hw();
omap_init_irq();
omap_gpio_init();
fsample_init_smc91x();
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_fsample_io_desc[] __initdata = {
{
.virtual = H2P2_DBG_FPGA_BASE,
.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
.length = H2P2_DBG_FPGA_SIZE,
.type = MT_DEVICE
},
{
.virtual = FSAMPLE_CPLD_BASE,
.pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
.length = FSAMPLE_CPLD_SIZE,
.type = MT_DEVICE
}
};
static void __init omap_fsample_map_io(void)
{
omap1_map_common_io();
iotable_init(omap_fsample_io_desc,
ARRAY_SIZE(omap_fsample_io_desc));
/* Early, board-dependent init */
/*
* Hold GSM Reset until needed
*/
omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
/*
* UARTs -> done automagically by 8250 driver
*/
/*
* CSx timings, GPIO Mux ... setup
*/
/* Flash: CS0 timings setup */
omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
/*
* Ethernet support through the debug board
* CS1 timings setup
*/
omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
/*
* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
* It is used as the Ethernet controller interrupt
*/
omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
}
MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
/* Maintainer: Brian Swetland <swetland@google.com> */
.phys_io = 0xfff00000,
.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
.boot_params = 0x10000100,
.map_io = omap_fsample_map_io,
.init_irq = omap_fsample_init_irq,
.init_machine = omap_fsample_init,
.timer = &omap_timer,
MACHINE_END
arch/arm/mach-omap1/board-innovator.c
View file @ a8c4c20d
...@@ -37,6 +37,8 @@ ...@@ -37,6 +37,8 @@
#include <asm/arch/usb.h> #include <asm/arch/usb.h>
#include <asm/arch/keypad.h> #include <asm/arch/keypad.h>
#include <asm/arch/common.h> #include <asm/arch/common.h>
#include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h>
static int innovator_keymap[] = { static int innovator_keymap[] = {
KEY(0, 0, KEY_F1), KEY(0, 0, KEY_F1),
...@@ -112,6 +114,42 @@ static struct platform_device innovator_flash_device = { ...@@ -112,6 +114,42 @@ static struct platform_device innovator_flash_device = {
.resource = &innovator_flash_resource, .resource = &innovator_flash_resource,
}; };
#define DEFAULT_BITPERSAMPLE 16
static struct omap_mcbsp_reg_cfg mcbsp_regs = {
.spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
.spcr1 = RINTM(3) | RRST,
.rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0),
.rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
.xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG,
.xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
.srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1),
.srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1),
/*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */
.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
};
static struct omap_alsa_codec_config alsa_config = {
.name = "OMAP Innovator AIC23",
.mcbsp_regs_alsa = &mcbsp_regs,
.codec_configure_dev = NULL, // aic23_configure,
.codec_set_samplerate = NULL, // aic23_set_samplerate,
.codec_clock_setup = NULL, // aic23_clock_setup,
.codec_clock_on = NULL, // aic23_clock_on,
.codec_clock_off = NULL, // aic23_clock_off,
.get_default_samplerate = NULL, // aic23_get_default_samplerate,
};
static struct platform_device innovator_mcbsp1_device = {
.name = "omap_alsa_mcbsp",
.id = 1,
.dev = {
.platform_data = &alsa_config,
},
};
static struct resource innovator_kp_resources[] = { static struct resource innovator_kp_resources[] = {
[0] = { [0] = {
.start = INT_KEYBOARD, .start = INT_KEYBOARD,
...@@ -139,6 +177,10 @@ static struct platform_device innovator_kp_device = { ...@@ -139,6 +177,10 @@ static struct platform_device innovator_kp_device = {
#ifdef CONFIG_ARCH_OMAP15XX #ifdef CONFIG_ARCH_OMAP15XX
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
/* Only FPGA needs to be mapped here. All others are done with ioremap */ /* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc innovator1510_io_desc[] __initdata = { static struct map_desc innovator1510_io_desc[] __initdata = {
{ {
...@@ -174,13 +216,44 @@ static struct platform_device innovator1510_lcd_device = { ...@@ -174,13 +216,44 @@ static struct platform_device innovator1510_lcd_device = {
.id = -1, .id = -1,
}; };
static struct platform_device innovator1510_spi_device = {
.name = "spi_inn1510",
.id = -1,
};
static struct platform_device *innovator1510_devices[] __initdata = { static struct platform_device *innovator1510_devices[] __initdata = {
&innovator_flash_device, &innovator_flash_device,
&innovator1510_smc91x_device, &innovator1510_smc91x_device,
&innovator_mcbsp1_device,
&innovator_kp_device, &innovator_kp_device,
&innovator1510_lcd_device, &innovator1510_lcd_device,
&innovator1510_spi_device,
}; };
static int innovator_get_pendown_state(void)
{
return !(fpga_read(OMAP1510_FPGA_TOUCHSCREEN) & (1 << 5));
}
static const struct ads7846_platform_data innovator1510_ts_info = {
.model = 7846,
.vref_delay_usecs = 100, /* internal, no capacitor */
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.get_pendown_state = innovator_get_pendown_state,
};
static struct spi_board_info __initdata innovator1510_boardinfo[] = { {
/* FPGA (bus "10") CS0 has an ads7846e */
.modalias = "ads7846",
.platform_data = &innovator1510_ts_info,
.irq = OMAP1510_INT_FPGA_TS,
.max_speed_hz = 120000 /* max sample rate at 3V */
* 26 /* command + data + overhead */,
.bus_num = 10,
.chip_select = 0,
} };
#endif /* CONFIG_ARCH_OMAP15XX */ #endif /* CONFIG_ARCH_OMAP15XX */
#ifdef CONFIG_ARCH_OMAP16XX #ifdef CONFIG_ARCH_OMAP16XX
...@@ -311,6 +384,8 @@ static void __init innovator_init(void) ...@@ -311,6 +384,8 @@ static void __init innovator_init(void)
#ifdef CONFIG_ARCH_OMAP15XX #ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) { if (cpu_is_omap1510()) {
platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices)); platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
spi_register_board_info(innovator1510_boardinfo,
ARRAY_SIZE(innovator1510_boardinfo));
} }
#endif #endif
#ifdef CONFIG_ARCH_OMAP16XX #ifdef CONFIG_ARCH_OMAP16XX
......
arch/arm/mach-omap1/board-osk.c
View file @ a8c4c20d
...@@ -33,7 +33,6 @@ ...@@ -33,7 +33,6 @@
#include <linux/mtd/mtd.h> #include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h> #include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
...@@ -45,25 +44,10 @@ ...@@ -45,25 +44,10 @@
#include <asm/arch/usb.h> #include <asm/arch/usb.h>
#include <asm/arch/mux.h> #include <asm/arch/mux.h>
#include <asm/arch/tc.h> #include <asm/arch/tc.h>
#include <asm/arch/keypad.h>
#include <asm/arch/common.h> #include <asm/arch/common.h>
#include <asm/arch/mcbsp.h> #include <asm/arch/mcbsp.h>
#include <asm/arch/omap-alsa.h> #include <asm/arch/omap-alsa.h>
static int osk_keymap[] = {
KEY(0, 0, KEY_F1),
KEY(0, 3, KEY_UP),
KEY(1, 1, KEY_LEFTCTRL),
KEY(1, 2, KEY_LEFT),
KEY(2, 0, KEY_SPACE),
KEY(2, 1, KEY_ESC),
KEY(2, 2, KEY_DOWN),
KEY(3, 2, KEY_ENTER),
KEY(3, 3, KEY_RIGHT),
0
};
static struct mtd_partition osk_partitions[] = { static struct mtd_partition osk_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */ /* bootloader (U-Boot, etc) in first sector */
{ {
...@@ -181,48 +165,17 @@ static struct omap_alsa_codec_config alsa_config = { ...@@ -181,48 +165,17 @@ static struct omap_alsa_codec_config alsa_config = {
static struct platform_device osk5912_mcbsp1_device = { static struct platform_device osk5912_mcbsp1_device = {
.name = "omap_alsa_mcbsp", .name = "omap_alsa_mcbsp",
.id = 1, .id = 1,
.dev = { .dev = {
.platform_data = &alsa_config, .platform_data = &alsa_config,
}, },
}; };
static struct resource osk5912_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct omap_kp_platform_data osk_kp_data = {
.rows = 8,
.cols = 8,
.keymap = osk_keymap,
};
static struct platform_device osk5912_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &osk_kp_data,
},
.num_resources = ARRAY_SIZE(osk5912_kp_resources),
.resource = osk5912_kp_resources,
};
static struct platform_device osk5912_lcd_device = {
.name = "lcd_osk",
.id = -1,
};
static struct platform_device *osk5912_devices[] __initdata = { static struct platform_device *osk5912_devices[] __initdata = {
&osk5912_flash_device, &osk5912_flash_device,
&osk5912_smc91x_device, &osk5912_smc91x_device,
&osk5912_cf_device, &osk5912_cf_device,
&osk5912_mcbsp1_device, &osk5912_mcbsp1_device,
&osk5912_kp_device,
&osk5912_lcd_device,
}; };
static void __init osk_init_smc91x(void) static void __init osk_init_smc91x(void)
...@@ -276,18 +229,100 @@ static struct omap_uart_config osk_uart_config __initdata = { ...@@ -276,18 +229,100 @@ static struct omap_uart_config osk_uart_config __initdata = {
.enabled_uarts = (1 << 0), .enabled_uarts = (1 << 0),
}; };
#ifdef CONFIG_OMAP_OSK_MISTRAL
static struct omap_lcd_config osk_lcd_config __initdata = { static struct omap_lcd_config osk_lcd_config __initdata = {
.ctrl_name = "internal", .ctrl_name = "internal",
}; };
#endif
static struct omap_board_config_kernel osk_config[] = { static struct omap_board_config_kernel osk_config[] = {
{ OMAP_TAG_USB, &osk_usb_config }, { OMAP_TAG_USB, &osk_usb_config },
{ OMAP_TAG_UART, &osk_uart_config }, { OMAP_TAG_UART, &osk_uart_config },
#ifdef CONFIG_OMAP_OSK_MISTRAL
{ OMAP_TAG_LCD, &osk_lcd_config }, { OMAP_TAG_LCD, &osk_lcd_config },
#endif
}; };
#ifdef CONFIG_OMAP_OSK_MISTRAL #ifdef CONFIG_OMAP_OSK_MISTRAL
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <asm/arch/keypad.h>
static const int osk_keymap[] = {
/* KEY(col, row, code) */
KEY(0, 0, KEY_F1), /* SW4 */
KEY(0, 3, KEY_UP), /* (sw2/up) */
KEY(1, 1, KEY_LEFTCTRL), /* SW5 */
KEY(1, 2, KEY_LEFT), /* (sw2/left) */
KEY(2, 0, KEY_SPACE), /* SW3 */
KEY(2, 1, KEY_ESC), /* SW6 */
KEY(2, 2, KEY_DOWN), /* (sw2/down) */
KEY(3, 2, KEY_ENTER), /* (sw2/select) */
KEY(3, 3, KEY_RIGHT), /* (sw2/right) */
0
};
static struct omap_kp_platform_data osk_kp_data = {
.rows = 8,
.cols = 8,
.keymap = (int *) osk_keymap,
};
static struct resource osk5912_kp_resources[] = {
[0] = {
.start = INT_KEYBOARD,
.end = INT_KEYBOARD,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device osk5912_kp_device = {
.name = "omap-keypad",
.id = -1,
.dev = {
.platform_data = &osk_kp_data,
},
.num_resources = ARRAY_SIZE(osk5912_kp_resources),
.resource = osk5912_kp_resources,
};
static struct platform_device osk5912_lcd_device = {
.name = "lcd_osk",
.id = -1,
};
static struct platform_device *mistral_devices[] __initdata = {
&osk5912_kp_device,
&osk5912_lcd_device,
};
static int mistral_get_pendown_state(void)
{
return !omap_get_gpio_datain(4);
}
static const struct ads7846_platform_data mistral_ts_info = {
.model = 7846,
.vref_delay_usecs = 100, /* internal, no capacitor */
.x_plate_ohms = 419,
.y_plate_ohms = 486,
.get_pendown_state = mistral_get_pendown_state,
};
static struct spi_board_info __initdata mistral_boardinfo[] = { {
/* MicroWire (bus 2) CS0 has an ads7846e */
.modalias = "ads7846",
.platform_data = &mistral_ts_info,
.irq = OMAP_GPIO_IRQ(4),
.max_speed_hz = 120000 /* max sample rate at 3V */
* 26 /* command + data + overhead */,
.bus_num = 2,
.chip_select = 0,
} };
#ifdef CONFIG_PM #ifdef CONFIG_PM
static irqreturn_t static irqreturn_t
osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs)
...@@ -298,14 +333,18 @@ osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs) ...@@ -298,14 +333,18 @@ osk_mistral_wake_interrupt(int irq, void *ignored, struct pt_regs *regs)
static void __init osk_mistral_init(void) static void __init osk_mistral_init(void)
{ {
/* FIXME here's where to feed in framebuffer, touchpad, and /* NOTE: we could actually tell if there's a Mistral board
* keyboard setup ... not in the drivers for those devices!
*
* NOTE: we could actually tell if there's a Mistral board
* attached, e.g. by trying to read something from the ads7846. * attached, e.g. by trying to read something from the ads7846.
* But this is too early for that... * But this arch_init() code is too early for that, since we
* can't talk to the ads or even the i2c eeprom.
*/ */
// omap_cfg_reg(P19_1610_GPIO6); // BUSY
omap_cfg_reg(P20_1610_GPIO4); // PENIRQ
set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING);
spi_register_board_info(mistral_boardinfo,
ARRAY_SIZE(mistral_boardinfo));
/* the sideways button (SW1) is for use as a "wakeup" button */ /* the sideways button (SW1) is for use as a "wakeup" button */
omap_cfg_reg(N15_1610_MPUIO2); omap_cfg_reg(N15_1610_MPUIO2);
if (omap_request_gpio(OMAP_MPUIO(2)) == 0) { if (omap_request_gpio(OMAP_MPUIO(2)) == 0) {
...@@ -329,6 +368,8 @@ static void __init osk_mistral_init(void) ...@@ -329,6 +368,8 @@ static void __init osk_mistral_init(void)
#endif #endif
} else } else
printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n"); printk(KERN_ERR "OSK+Mistral: wakeup button is awol\n");
platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices));
} }
#else #else
static void __init osk_mistral_init(void) { } static void __init osk_mistral_init(void) { }
......
arch/arm/mach-omap1/clock.c
View file @ a8c4c20d
//kernel/linux-omap-fsample/arch/arm/mach-omap1/clock.c#2 - edit change 3808 (text)
/* /*
* linux/arch/arm/mach-omap1/clock.c * linux/arch/arm/mach-omap1/clock.c
* *
...@@ -20,6 +21,7 @@ ...@@ -20,6 +21,7 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/usb.h> #include <asm/arch/usb.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#include <asm/arch/sram.h> #include <asm/arch/sram.h>
...@@ -270,8 +272,12 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) ...@@ -270,8 +272,12 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
/* /*
* In most cases we should not need to reprogram DPLL. * In most cases we should not need to reprogram DPLL.
* Reprogramming the DPLL is tricky, it must be done from SRAM. * Reprogramming the DPLL is tricky, it must be done from SRAM.
* (on 730, bit 13 must always be 1)
*/ */
omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); if (cpu_is_omap730())
omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val | 0x2000);
else
omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
ck_dpll1.rate = ptr->pll_rate; ck_dpll1.rate = ptr->pll_rate;
propagate_rate(&ck_dpll1); propagate_rate(&ck_dpll1);
...@@ -748,7 +754,7 @@ int __init omap1_clk_init(void) ...@@ -748,7 +754,7 @@ int __init omap1_clk_init(void)
printk(KERN_ERR "System frequencies not set. Check your config.\n"); printk(KERN_ERR "System frequencies not set. Check your config.\n");
/* Guess sane values (60MHz) */ /* Guess sane values (60MHz) */
omap_writew(0x2290, DPLL_CTL); omap_writew(0x2290, DPLL_CTL);
omap_writew(0x1005, ARM_CKCTL); omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL);
ck_dpll1.rate = 60000000; ck_dpll1.rate = 60000000;
propagate_rate(&ck_dpll1); propagate_rate(&ck_dpll1);
} }
...@@ -761,13 +767,17 @@ int __init omap1_clk_init(void) ...@@ -761,13 +767,17 @@ int __init omap1_clk_init(void)
ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
#ifdef CONFIG_MACH_OMAP_PERSEUS2 #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
/* Select slicer output as OMAP input clock */ /* Select slicer output as OMAP input clock */
omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL); omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
#endif #endif
/* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */ /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL); /* (on 730, bit 13 must not be cleared) */
if (cpu_is_omap730())
omap_writew(omap_readw(ARM_CKCTL) & 0x2fff, ARM_CKCTL);
else
omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
/* Put DSP/MPUI into reset until needed */ /* Put DSP/MPUI into reset until needed */
omap_writew(0, ARM_RSTCT1); omap_writew(0, ARM_RSTCT1);
......
arch/arm/mach-omap1/pm.c
View file @ a8c4c20d
//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text)
/* /*
* linux/arch/arm/mach-omap1/pm.c * linux/arch/arm/mach-omap1/pm.c
* *
...@@ -50,6 +51,7 @@ ...@@ -50,6 +51,7 @@
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/arch/cpu.h>
#include <asm/arch/irqs.h> #include <asm/arch/irqs.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#include <asm/arch/sram.h> #include <asm/arch/sram.h>
...@@ -326,8 +328,9 @@ void omap_pm_suspend(void) ...@@ -326,8 +328,9 @@ void omap_pm_suspend(void)
/* stop DSP */ /* stop DSP */
omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1); omap_writew(omap_readw(ARM_RSTCT1) & ~(1 << DSP_EN), ARM_RSTCT1);
/* shut down dsp_ck */ /* shut down dsp_ck */
omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL); if (!cpu_is_omap730())
omap_writew(omap_readw(ARM_CKCTL) & ~(1 << EN_DSPCK), ARM_CKCTL);
/* temporarily enabling api_ck to access DSP registers */ /* temporarily enabling api_ck to access DSP registers */
omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2);
......
arch/arm/mach-omap1/time.c
View file @ a8c4c20d
...@@ -93,7 +93,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc) ...@@ -93,7 +93,7 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
* will break. On P2, the timer count rate is 6.5 MHz after programming PTV * will break. On P2, the timer count rate is 6.5 MHz after programming PTV
* with 0. This divides the 13MHz input by 2, and is undocumented. * with 0. This divides the 13MHz input by 2, and is undocumented.
*/ */
#ifdef CONFIG_MACH_OMAP_PERSEUS2 #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
/* REVISIT: This ifdef construct should be replaced by a query to clock /* REVISIT: This ifdef construct should be replaced by a query to clock
* framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz. * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
*/ */
......
arch/arm/mach-omap2/Kconfig
View file @ a8c4c20d
...@@ -8,6 +8,7 @@ config ARCH_OMAP24XX ...@@ -8,6 +8,7 @@ config ARCH_OMAP24XX
config ARCH_OMAP2420 config ARCH_OMAP2420
bool "OMAP2420 support" bool "OMAP2420 support"
depends on ARCH_OMAP24XX depends on ARCH_OMAP24XX
select OMAP_DM_TIMER
comment "OMAP Board Type" comment "OMAP Board Type"
depends on ARCH_OMAP2 depends on ARCH_OMAP2
......
arch/arm/mach-omap2/Makefile
View file @ a8c4c20d
...@@ -3,12 +3,13 @@ ...@@ -3,12 +3,13 @@
# #
# Common support # Common support
obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o \
serial.o gpmc.o
obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o
# Power Management # Power Management
obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o
# Specific board support # Specific board support
obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o
......
arch/arm/mach-omap2/clock.c
View file @ a8c4c20d
...@@ -659,26 +659,35 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate) ...@@ -659,26 +659,35 @@ static int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
/* Isolate control register */ /* Isolate control register */
div_sel = (SRC_RATE_SEL_MASK & clk->flags); div_sel = (SRC_RATE_SEL_MASK & clk->flags);
div_off = clk->src_offset; div_off = clk->rate_offset;
validrate = omap2_clksel_round_rate(clk, rate, &new_div); validrate = omap2_clksel_round_rate(clk, rate, &new_div);
if(validrate != rate) if (validrate != rate)
return(ret); return(ret);
field_val = omap2_get_clksel(&div_sel, &field_mask, clk); field_val = omap2_get_clksel(&div_sel, &field_mask, clk);
if (div_sel == 0) if (div_sel == 0)
return ret; return ret;
if(clk->flags & CM_SYSCLKOUT_SEL1){ if (clk->flags & CM_SYSCLKOUT_SEL1) {
switch(new_div){ switch (new_div) {
case 16: field_val = 4; break; case 16:
case 8: field_val = 3; break; field_val = 4;
case 4: field_val = 2; break; break;
case 2: field_val = 1; break; case 8:
case 1: field_val = 0; break; field_val = 3;
break;
case 4:
field_val = 2;
break;
case 2:
field_val = 1;
break;
case 1:
field_val = 0;
break;
} }
} } else
else
field_val = new_div; field_val = new_div;
reg = (void __iomem *)div_sel; reg = (void __iomem *)div_sel;
...@@ -743,7 +752,7 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset, ...@@ -743,7 +752,7 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
val = 0x2; val = 0x2;
break; break;
case CM_WKUP_SEL1: case CM_WKUP_SEL1:
src_reg_addr = (u32)&CM_CLKSEL2_CORE; src_reg_addr = (u32)&CM_CLKSEL_WKUP;
mask = 0x3; mask = 0x3;
if (src_clk == &func_32k_ck) if (src_clk == &func_32k_ck)
val = 0x0; val = 0x0;
...@@ -783,9 +792,9 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset, ...@@ -783,9 +792,9 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
val = 0; val = 0;
if (src_clk == &sys_ck) if (src_clk == &sys_ck)
val = 1; val = 1;
if (src_clk == &func_54m_ck)
val = 2;
if (src_clk == &func_96m_ck) if (src_clk == &func_96m_ck)
val = 2;
if (src_clk == &func_54m_ck)
val = 3; val = 3;
break; break;
} }
......
arch/arm/mach-omap2/clock.h
View file @ a8c4c20d
...@@ -1062,7 +1062,7 @@ static struct clk gpt2_ick = { ...@@ -1062,7 +1062,7 @@ static struct clk gpt2_ick = {
.parent = &l4_ck, .parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */ .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */
.enable_bit = 0, .enable_bit = 4,
.recalc = &omap2_followparent_recalc, .recalc = &omap2_followparent_recalc,
}; };
......
arch/arm/mach-omap2/devices.c
View file @ a8c4c20d
...@@ -104,6 +104,51 @@ static inline void omap_init_sti(void) ...@@ -104,6 +104,51 @@ static inline void omap_init_sti(void)
static inline void omap_init_sti(void) {} static inline void omap_init_sti(void) {}
#endif #endif
#if defined(CONFIG_SPI_OMAP24XX)
#include <asm/arch/mcspi.h>
#define OMAP2_MCSPI1_BASE 0x48098000
#define OMAP2_MCSPI2_BASE 0x4809a000
/* FIXME: use resources instead */
static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
.base = io_p2v(OMAP2_MCSPI1_BASE),
.num_cs = 4,
};
struct platform_device omap2_mcspi1 = {
.name = "omap2_mcspi",
.id = 1,
.dev = {
.platform_data = &omap2_mcspi1_config,
},
};
static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
.base = io_p2v(OMAP2_MCSPI2_BASE),
.num_cs = 2,
};
struct platform_device omap2_mcspi2 = {
.name = "omap2_mcspi",
.id = 2,
.dev = {
.platform_data = &omap2_mcspi2_config,
},
};
static void omap_init_mcspi(void)
{
platform_device_register(&omap2_mcspi1);
platform_device_register(&omap2_mcspi2);
}
#else
static inline void omap_init_mcspi(void) {}
#endif
/*-------------------------------------------------------------------------*/ /*-------------------------------------------------------------------------*/
static int __init omap2_init_devices(void) static int __init omap2_init_devices(void)
...@@ -112,6 +157,7 @@ static int __init omap2_init_devices(void) ...@@ -112,6 +157,7 @@ static int __init omap2_init_devices(void)
* in alphabetical order so they're easier to sort through. * in alphabetical order so they're easier to sort through.
*/ */
omap_init_i2c(); omap_init_i2c();
omap_init_mcspi();
omap_init_sti(); omap_init_sti();
return 0; return 0;
......
arch/arm/mach-omap2/gpmc.c 0 → 100644
View file @ a8c4c20d
/*
* GPMC support functions
*
* Copyright (C) 2005-2006 Nokia Corporation
*
* Author: Juha Yrjola
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <asm/io.h>
#include <asm/arch/gpmc.h>
#undef DEBUG
#define GPMC_BASE 0x6800a000
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
#define GPMC_SYSSTATUS 0x14
#define GPMC_IRQSTATUS 0x18
#define GPMC_IRQENABLE 0x1c
#define GPMC_TIMEOUT_CONTROL 0x40
#define GPMC_ERR_ADDRESS 0x44
#define GPMC_ERR_TYPE 0x48
#define GPMC_CONFIG 0x50
#define GPMC_STATUS 0x54
#define GPMC_PREFETCH_CONFIG1 0x1e0
#define GPMC_PREFETCH_CONFIG2 0x1e4
#define GPMC_PREFETCH_CONTROL 0x1e8
#define GPMC_PREFETCH_STATUS 0x1f0
#define GPMC_ECC_CONFIG 0x1f4
#define GPMC_ECC_CONTROL 0x1f8
#define GPMC_ECC_SIZE_CONFIG 0x1fc
#define GPMC_CS0 0x60
#define GPMC_CS_SIZE 0x30
static void __iomem *gpmc_base =
(void __iomem *) IO_ADDRESS(GPMC_BASE);
static void __iomem *gpmc_cs_base =
(void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0;
static struct clk *gpmc_l3_clk;
static void gpmc_write_reg(int idx, u32 val)
{
__raw_writel(val, gpmc_base + idx);
}
static u32 gpmc_read_reg(int idx)
{
return __raw_readl(gpmc_base + idx);
}
void gpmc_cs_write_reg(int cs, int idx, u32 val)
{
void __iomem *reg_addr;
reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx;
__raw_writel(val, reg_addr);
}
u32 gpmc_cs_read_reg(int cs, int idx)
{
return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx);
}
/* TODO: Add support for gpmc_fck to clock framework and use it */
static unsigned long gpmc_get_fclk_period(void)
{
/* In picoseconds */
return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000);
}
unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
{
unsigned long tick_ps;
/* Calculate in picosecs to yield more exact results */
tick_ps = gpmc_get_fclk_period();
return (time_ns * 1000 + tick_ps - 1) / tick_ps;
}
#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
#else
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time)
#endif
{
u32 l;
int ticks, mask, nr_bits;
if (time == 0)
ticks = 0;
else
ticks = gpmc_ns_to_ticks(time);
nr_bits = end_bit - st_bit + 1;
if (ticks >= 1 << nr_bits)
return -1;
mask = (1 << nr_bits) - 1;
l = gpmc_cs_read_reg(cs, reg);
#ifdef DEBUG
printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n",
cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
(l >> st_bit) & mask);
#endif
l &= ~(mask << st_bit);
l |= ticks << st_bit;
gpmc_cs_write_reg(cs, reg, l);
return 0;
}
#ifdef DEBUG
#define GPMC_SET_ONE(reg, st, end, field) \
if (set_gpmc_timing_reg(cs, (reg), (st), (end), \
t->field, #field) < 0) \
return -1
#else
#define GPMC_SET_ONE(reg, st, end, field) \
if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \
return -1
#endif
int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
{
int div;
u32 l;
l = sync_clk * 1000 + (gpmc_get_fclk_period() - 1);
div = l / gpmc_get_fclk_period();
if (div > 4)
return -1;
if (div < 0)
div = 1;
return div;
}
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
int div;
u32 l;
div = gpmc_cs_calc_divider(cs, t->sync_clk);
if (div < 0)
return -1;
GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on);
GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off);
GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
#ifdef DEBUG
printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n",
cs, gpmc_get_fclk_period(), div);
#endif
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
l &= ~0x03;
l |= (div - 1);
return 0;
}
unsigned long gpmc_cs_get_base_addr(int cs)
{
return (gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7) & 0x1f) << 24;
}
void __init gpmc_init(void)
{
u32 l;
gpmc_l3_clk = clk_get(NULL, "core_l3_ck");
BUG_ON(IS_ERR(gpmc_l3_clk));
l = gpmc_read_reg(GPMC_REVISION);
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
/* Set smart idle mode and automatic L3 clock gating */
l = gpmc_read_reg(GPMC_SYSCONFIG);
l &= 0x03 << 3;
l |= (0x02 << 3) | (1 << 0);
gpmc_write_reg(GPMC_SYSCONFIG, l);
}
arch/arm/mach-omap2/io.c
View file @ a8c4c20d
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
extern void omap_sram_init(void); extern void omap_sram_init(void);
extern int omap2_clk_init(void); extern int omap2_clk_init(void);
extern void omap2_check_revision(void); extern void omap2_check_revision(void);
extern void gpmc_init(void);
/* /*
* The machine specific code may provide the extra mapping besides the * The machine specific code may provide the extra mapping besides the
...@@ -66,4 +67,5 @@ void __init omap2_init_common_hw(void) ...@@ -66,4 +67,5 @@ void __init omap2_init_common_hw(void)
{ {
omap2_mux_init(); omap2_mux_init();
omap2_clk_init(); omap2_clk_init();
gpmc_init();
} }
arch/arm/mach-omap2/mux.c
View file @ a8c4c20d
...@@ -52,6 +52,12 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) ...@@ -52,6 +52,12 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
/* 24xx clocks */ /* 24xx clocks */
MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
/* 24xx GPMC wait pin monitoring */
MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
/* 24xx McBSP */ /* 24xx McBSP */
MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
...@@ -59,18 +65,38 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) ...@@ -59,18 +65,38 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
/* 24xx GPIO */ /* 24xx GPIO */
MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
/* 242x DBG GPIO */
MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
/* 24xx external DMA requests */
MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
/* TSC IRQ */ /* TSC IRQ */
MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
......
arch/arm/mach-omap2/pm-domain.c 0 → 100644
View file @ a8c4c20d
/*
* linux/arch/arm/mach-omap2/pm-domain.c
*
* Power domain functions for OMAP2
*
* Copyright (C) 2006 Nokia Corporation
* Tony Lindgren <tony@atomide.com>
*
* Some code based on earlier OMAP2 sample PM code
* Copyright (C) 2005 Texas Instruments, Inc.
* Richard Woodruff <r-woodruff2@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <asm/io.h>
#include "prcm-regs.h"
/* Power domain offsets */
#define PM_MPU_OFFSET 0x100
#define PM_CORE_OFFSET 0x200
#define PM_GFX_OFFSET 0x300
#define PM_WKUP_OFFSET 0x400 /* Autoidle only */
#define PM_PLL_OFFSET 0x500 /* Autoidle only */
#define PM_DSP_OFFSET 0x800
#define PM_MDM_OFFSET 0xc00
/* Power domain wake-up dependency control register */
#define PM_WKDEP_OFFSET 0xc8
#define EN_MDM (1 << 5)
#define EN_WKUP (1 << 4)
#define EN_GFX (1 << 3)
#define EN_DSP (1 << 2)
#define EN_MPU (1 << 1)
#define EN_CORE (1 << 0)
/* Core power domain state transition control register */
#define PM_PWSTCTRL_OFFSET 0xe0
#define FORCESTATE (1 << 18) /* Only for DSP & GFX */
#define MEM4RETSTATE (1 << 6)
#define MEM3RETSTATE (1 << 5)
#define MEM2RETSTATE (1 << 4)
#define MEM1RETSTATE (1 << 3)
#define LOGICRETSTATE (1 << 2) /* Logic is retained */
#define POWERSTATE_OFF 0x3
#define POWERSTATE_RETENTION 0x1
#define POWERSTATE_ON 0x0
/* Power domain state register */
#define PM_PWSTST_OFFSET 0xe4
/* Hardware supervised state transition control register */
#define CM_CLKSTCTRL_OFFSET 0x48
#define AUTOSTAT_MPU (1 << 0) /* MPU */
#define AUTOSTAT_DSS (1 << 2) /* Core */
#define AUTOSTAT_L4 (1 << 1) /* Core */
#define AUTOSTAT_L3 (1 << 0) /* Core */
#define AUTOSTAT_GFX (1 << 0) /* GFX */
#define AUTOSTAT_IVA (1 << 8) /* 2420 IVA in DSP domain */
#define AUTOSTAT_DSP (1 << 0) /* DSP */
#define AUTOSTAT_MDM (1 << 0) /* MDM */
/* Automatic control of interface clock idling */
#define CM_AUTOIDLE1_OFFSET 0x30
#define CM_AUTOIDLE2_OFFSET 0x34 /* Core only */
#define CM_AUTOIDLE3_OFFSET 0x38 /* Core only */
#define CM_AUTOIDLE4_OFFSET 0x3c /* Core only */
#define AUTO_54M(x) (((x) & 0x3) << 6)
#define AUTO_96M(x) (((x) & 0x3) << 2)
#define AUTO_DPLL(x) (((x) & 0x3) << 0)
#define AUTO_STOPPED 0x3
#define AUTO_BYPASS_FAST 0x2 /* DPLL only */
#define AUTO_BYPASS_LOW_POWER 0x1 /* DPLL only */
#define AUTO_DISABLED 0x0
/* Voltage control PRCM_VOLTCTRL bits */
#define AUTO_EXTVOLT (1 << 15)
#define FORCE_EXTVOLT (1 << 14)
#define SETOFF_LEVEL(x) (((x) & 0x3) << 12)
#define MEMRETCTRL (1 << 8)
#define SETRET_LEVEL(x) (((x) & 0x3) << 6)
#define VOLT_LEVEL(x) (((x) & 0x3) << 0)
#define OMAP24XX_PRCM_VBASE IO_ADDRESS(OMAP24XX_PRCM_BASE)
#define prcm_readl(r) __raw_readl(OMAP24XX_PRCM_VBASE + (r))
#define prcm_writel(v, r) __raw_writel((v), OMAP24XX_PRCM_VBASE + (r))
static u32 pmdomain_get_wakeup_dependencies(int domain_offset)
{
return prcm_readl(domain_offset + PM_WKDEP_OFFSET);
}
static void pmdomain_set_wakeup_dependencies(u32 state, int domain_offset)
{
prcm_writel(state, domain_offset + PM_WKDEP_OFFSET);
}
static u32 pmdomain_get_powerstate(int domain_offset)
{
return prcm_readl(domain_offset + PM_PWSTCTRL_OFFSET);
}
static void pmdomain_set_powerstate(u32 state, int domain_offset)
{
prcm_writel(state, domain_offset + PM_PWSTCTRL_OFFSET);
}
static u32 pmdomain_get_clock_autocontrol(int domain_offset)
{
return prcm_readl(domain_offset + CM_CLKSTCTRL_OFFSET);
}
static void pmdomain_set_clock_autocontrol(u32 state, int domain_offset)
{
prcm_writel(state, domain_offset + CM_CLKSTCTRL_OFFSET);
}
static u32 pmdomain_get_clock_autoidle1(int domain_offset)
{
return prcm_readl(domain_offset + CM_AUTOIDLE1_OFFSET);
}
/* Core domain only */
static u32 pmdomain_get_clock_autoidle2(int domain_offset)
{
return prcm_readl(domain_offset + CM_AUTOIDLE2_OFFSET);
}
/* Core domain only */
static u32 pmdomain_get_clock_autoidle3(int domain_offset)
{
return prcm_readl(domain_offset + CM_AUTOIDLE3_OFFSET);
}
/* Core domain only */
static u32 pmdomain_get_clock_autoidle4(int domain_offset)
{
return prcm_readl(domain_offset + CM_AUTOIDLE4_OFFSET);
}
static void pmdomain_set_clock_autoidle1(u32 state, int domain_offset)
{
prcm_writel(state, CM_AUTOIDLE1_OFFSET + domain_offset);
}
/* Core domain only */
static void pmdomain_set_clock_autoidle2(u32 state, int domain_offset)
{
prcm_writel(state, CM_AUTOIDLE2_OFFSET + domain_offset);
}
/* Core domain only */
static void pmdomain_set_clock_autoidle3(u32 state, int domain_offset)
{
prcm_writel(state, CM_AUTOIDLE3_OFFSET + domain_offset);
}
/* Core domain only */
static void pmdomain_set_clock_autoidle4(u32 state, int domain_offset)
{
prcm_writel(state, CM_AUTOIDLE4_OFFSET + domain_offset);
}
/*
* Configures power management domains to idle clocks automatically.
*/
void pmdomain_set_autoidle(void)
{
u32 val;
/* Set PLL auto stop for 54M, 96M & DPLL */
pmdomain_set_clock_autoidle1(AUTO_54M(AUTO_STOPPED) |
AUTO_96M(AUTO_STOPPED) |
AUTO_DPLL(AUTO_STOPPED), PM_PLL_OFFSET);
/* External clock input control
* REVISIT: Should this be in clock framework?
*/
PRCM_CLKSRC_CTRL |= (0x3 << 3);
/* Configure number of 32KHz clock cycles for sys_clk */
PRCM_CLKSSETUP = 0x00ff;
/* Configure automatic voltage transition */
PRCM_VOLTSETUP = 0;
val = PRCM_VOLTCTRL;
val &= ~(SETOFF_LEVEL(0x3) | VOLT_LEVEL(0x3));
val |= SETOFF_LEVEL(1) | VOLT_LEVEL(1) | AUTO_EXTVOLT;
PRCM_VOLTCTRL = val;
/* Disable emulation tools functional clock */
PRCM_CLKEMUL_CTRL = 0x0;
/* Set core memory retention state */
val = pmdomain_get_powerstate(PM_CORE_OFFSET);
if (cpu_is_omap2420()) {
val &= ~(0x7 << 3);
val |= (MEM3RETSTATE | MEM2RETSTATE | MEM1RETSTATE);
} else {
val &= ~(0xf << 3);
val |= (MEM4RETSTATE | MEM3RETSTATE | MEM2RETSTATE |
MEM1RETSTATE);
}
pmdomain_set_powerstate(val, PM_CORE_OFFSET);
/* OCP interface smart idle. REVISIT: Enable autoidle bit0 ? */
val = SMS_SYSCONFIG;
val &= ~(0x3 << 3);
val |= (0x2 << 3) | (1 << 0);
SMS_SYSCONFIG |= val;
val = SDRC_SYSCONFIG;
val &= ~(0x3 << 3);
val |= (0x2 << 3);
SDRC_SYSCONFIG = val;
/* Configure L3 interface for smart idle.
* REVISIT: Enable autoidle bit0 ?
*/
val = GPMC_SYSCONFIG;
val &= ~(0x3 << 3);
val |= (0x2 << 3) | (1 << 0);
GPMC_SYSCONFIG = val;
pmdomain_set_powerstate(LOGICRETSTATE | POWERSTATE_RETENTION,
PM_MPU_OFFSET);
pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_CORE_OFFSET);
if (!cpu_is_omap2420())
pmdomain_set_powerstate(POWERSTATE_RETENTION, PM_MDM_OFFSET);
/* Assume suspend function has saved the state for DSP and GFX */
pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_DSP_OFFSET);
pmdomain_set_powerstate(FORCESTATE | POWERSTATE_OFF, PM_GFX_OFFSET);
#if 0
/* REVISIT: Internal USB needs special handling */
force_standby_usb();
if (cpu_is_omap2430())
force_hsmmc();
sdram_self_refresh_on_idle_req(1);
#endif
/* Enable clock auto control for all domains.
* Note that CORE domain includes also DSS, L4 & L3.
*/
pmdomain_set_clock_autocontrol(AUTOSTAT_MPU, PM_MPU_OFFSET);
pmdomain_set_clock_autocontrol(AUTOSTAT_GFX, PM_GFX_OFFSET);
pmdomain_set_clock_autocontrol(AUTOSTAT_DSS | AUTOSTAT_L4 | AUTOSTAT_L3,
PM_CORE_OFFSET);
if (cpu_is_omap2420())
pmdomain_set_clock_autocontrol(AUTOSTAT_IVA | AUTOSTAT_DSP,
PM_DSP_OFFSET);
else {
pmdomain_set_clock_autocontrol(AUTOSTAT_DSP, PM_DSP_OFFSET);
pmdomain_set_clock_autocontrol(AUTOSTAT_MDM, PM_MDM_OFFSET);
}
/* Enable clock autoidle for all domains */
pmdomain_set_clock_autoidle1(0x2, PM_DSP_OFFSET);
if (cpu_is_omap2420()) {
pmdomain_set_clock_autoidle1(0xfffffff9, PM_CORE_OFFSET);
pmdomain_set_clock_autoidle2(0x7, PM_CORE_OFFSET);
pmdomain_set_clock_autoidle1(0x3f, PM_WKUP_OFFSET);
} else {
pmdomain_set_clock_autoidle1(0xeafffff1, PM_CORE_OFFSET);
pmdomain_set_clock_autoidle2(0xfff, PM_CORE_OFFSET);
pmdomain_set_clock_autoidle1(0x7f, PM_WKUP_OFFSET);
pmdomain_set_clock_autoidle1(0x3, PM_MDM_OFFSET);
}
pmdomain_set_clock_autoidle3(0x7, PM_CORE_OFFSET);
pmdomain_set_clock_autoidle4(0x1f, PM_CORE_OFFSET);
}
/*
* Initializes power domains by removing wake-up dependencies and powering
* down DSP and GFX. Gets called from PM init. Note that DSP and IVA code
* must re-enable DSP and GFX when used.
*/
void __init pmdomain_init(void)
{
/* Remove all domain wakeup dependencies */
pmdomain_set_wakeup_dependencies(EN_WKUP | EN_CORE, PM_MPU_OFFSET);
pmdomain_set_wakeup_dependencies(0, PM_DSP_OFFSET);
pmdomain_set_wakeup_dependencies(0, PM_GFX_OFFSET);
pmdomain_set_wakeup_dependencies(EN_WKUP | EN_MPU, PM_CORE_OFFSET);
if (cpu_is_omap2430())
pmdomain_set_wakeup_dependencies(0, PM_MDM_OFFSET);
/* Power down DSP and GFX */
pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_DSP_OFFSET);
pmdomain_set_powerstate(POWERSTATE_OFF | FORCESTATE, PM_GFX_OFFSET);
}
arch/arm/mach-omap2/pm.c
View file @ a8c4c20d
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/sysfs.h> #include <linux/sysfs.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/delay.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/irq.h> #include <asm/irq.h>
...@@ -36,11 +37,18 @@ ...@@ -36,11 +37,18 @@
#include <asm/arch/sram.h> #include <asm/arch/sram.h>
#include <asm/arch/pm.h> #include <asm/arch/pm.h>
#include "prcm-regs.h"
static struct clk *vclk; static struct clk *vclk;
static void (*omap2_sram_idle)(void); static void (*omap2_sram_idle)(void);
static void (*omap2_sram_suspend)(int dllctrl, int cpu_rev); static void (*omap2_sram_suspend)(int dllctrl, int cpu_rev);
static void (*saved_idle)(void); static void (*saved_idle)(void);
extern void __init pmdomain_init(void);
extern void pmdomain_set_autoidle(void);
static unsigned int omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_SIZE];
void omap2_pm_idle(void) void omap2_pm_idle(void)
{ {
local_irq_disable(); local_irq_disable();
...@@ -87,23 +95,272 @@ static int omap2_pm_prepare(suspend_state_t state) ...@@ -87,23 +95,272 @@ static int omap2_pm_prepare(suspend_state_t state)
return error; return error;
} }
#define INT0_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK1) | \
OMAP_IRQ_BIT(INT_24XX_GPIO_BANK2) | \
OMAP_IRQ_BIT(INT_24XX_GPIO_BANK3))
#define INT1_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_GPIO_BANK4))
#define INT2_WAKE_MASK (OMAP_IRQ_BIT(INT_24XX_UART1_IRQ) | \
OMAP_IRQ_BIT(INT_24XX_UART2_IRQ) | \
OMAP_IRQ_BIT(INT_24XX_UART3_IRQ))
#define preg(reg) printk("%s\t(0x%p):\t0x%08x\n", #reg, &reg, reg);
static void omap2_pm_debug(char * desc)
{
printk("%s:\n", desc);
preg(CM_CLKSTCTRL_MPU);
preg(CM_CLKSTCTRL_CORE);
preg(CM_CLKSTCTRL_GFX);
preg(CM_CLKSTCTRL_DSP);
preg(CM_CLKSTCTRL_MDM);
preg(PM_PWSTCTRL_MPU);
preg(PM_PWSTCTRL_CORE);
preg(PM_PWSTCTRL_GFX);
preg(PM_PWSTCTRL_DSP);
preg(PM_PWSTCTRL_MDM);
preg(PM_PWSTST_MPU);
preg(PM_PWSTST_CORE);
preg(PM_PWSTST_GFX);
preg(PM_PWSTST_DSP);
preg(PM_PWSTST_MDM);
preg(CM_AUTOIDLE1_CORE);
preg(CM_AUTOIDLE2_CORE);
preg(CM_AUTOIDLE3_CORE);
preg(CM_AUTOIDLE4_CORE);
preg(CM_AUTOIDLE_WKUP);
preg(CM_AUTOIDLE_PLL);
preg(CM_AUTOIDLE_DSP);
preg(CM_AUTOIDLE_MDM);
preg(CM_ICLKEN1_CORE);
preg(CM_ICLKEN2_CORE);
preg(CM_ICLKEN3_CORE);
preg(CM_ICLKEN4_CORE);
preg(CM_ICLKEN_GFX);
preg(CM_ICLKEN_WKUP);
preg(CM_ICLKEN_DSP);
preg(CM_ICLKEN_MDM);
preg(CM_IDLEST1_CORE);
preg(CM_IDLEST2_CORE);
preg(CM_IDLEST3_CORE);
preg(CM_IDLEST4_CORE);
preg(CM_IDLEST_GFX);
preg(CM_IDLEST_WKUP);
preg(CM_IDLEST_CKGEN);
preg(CM_IDLEST_DSP);
preg(CM_IDLEST_MDM);
preg(RM_RSTST_MPU);
preg(RM_RSTST_GFX);
preg(RM_RSTST_WKUP);
preg(RM_RSTST_DSP);
preg(RM_RSTST_MDM);
preg(PM_WKDEP_MPU);
preg(PM_WKDEP_CORE);
preg(PM_WKDEP_GFX);
preg(PM_WKDEP_DSP);
preg(PM_WKDEP_MDM);
preg(CM_FCLKEN_WKUP);
preg(CM_ICLKEN_WKUP);
preg(CM_IDLEST_WKUP);
preg(CM_AUTOIDLE_WKUP);
preg(CM_CLKSEL_WKUP);
preg(PM_WKEN_WKUP);
preg(PM_WKST_WKUP);
}
static inline void omap2_pm_save_registers(void)
{
/* Save interrupt registers */
OMAP24XX_SAVE(INTC_MIR0);
OMAP24XX_SAVE(INTC_MIR1);
OMAP24XX_SAVE(INTC_MIR2);
/* Save power control registers */
OMAP24XX_SAVE(CM_CLKSTCTRL_MPU);
OMAP24XX_SAVE(CM_CLKSTCTRL_CORE);
OMAP24XX_SAVE(CM_CLKSTCTRL_GFX);
OMAP24XX_SAVE(CM_CLKSTCTRL_DSP);
OMAP24XX_SAVE(CM_CLKSTCTRL_MDM);
/* Save power state registers */
OMAP24XX_SAVE(PM_PWSTCTRL_MPU);
OMAP24XX_SAVE(PM_PWSTCTRL_CORE);
OMAP24XX_SAVE(PM_PWSTCTRL_GFX);
OMAP24XX_SAVE(PM_PWSTCTRL_DSP);
OMAP24XX_SAVE(PM_PWSTCTRL_MDM);
/* Save autoidle registers */
OMAP24XX_SAVE(CM_AUTOIDLE1_CORE);
OMAP24XX_SAVE(CM_AUTOIDLE2_CORE);
OMAP24XX_SAVE(CM_AUTOIDLE3_CORE);
OMAP24XX_SAVE(CM_AUTOIDLE4_CORE);
OMAP24XX_SAVE(CM_AUTOIDLE_WKUP);
OMAP24XX_SAVE(CM_AUTOIDLE_PLL);
OMAP24XX_SAVE(CM_AUTOIDLE_DSP);
OMAP24XX_SAVE(CM_AUTOIDLE_MDM);
/* Save idle state registers */
OMAP24XX_SAVE(CM_IDLEST1_CORE);
OMAP24XX_SAVE(CM_IDLEST2_CORE);
OMAP24XX_SAVE(CM_IDLEST3_CORE);
OMAP24XX_SAVE(CM_IDLEST4_CORE);
OMAP24XX_SAVE(CM_IDLEST_GFX);
OMAP24XX_SAVE(CM_IDLEST_WKUP);
OMAP24XX_SAVE(CM_IDLEST_CKGEN);
OMAP24XX_SAVE(CM_IDLEST_DSP);
OMAP24XX_SAVE(CM_IDLEST_MDM);
/* Save clock registers */
OMAP24XX_SAVE(CM_FCLKEN1_CORE);
OMAP24XX_SAVE(CM_FCLKEN2_CORE);
OMAP24XX_SAVE(CM_ICLKEN1_CORE);
OMAP24XX_SAVE(CM_ICLKEN2_CORE);
OMAP24XX_SAVE(CM_ICLKEN3_CORE);
OMAP24XX_SAVE(CM_ICLKEN4_CORE);
}
static inline void omap2_pm_restore_registers(void)
{
/* Restore clock state registers */
OMAP24XX_RESTORE(CM_CLKSTCTRL_MPU);
OMAP24XX_RESTORE(CM_CLKSTCTRL_CORE);
OMAP24XX_RESTORE(CM_CLKSTCTRL_GFX);
OMAP24XX_RESTORE(CM_CLKSTCTRL_DSP);
OMAP24XX_RESTORE(CM_CLKSTCTRL_MDM);
/* Restore power state registers */
OMAP24XX_RESTORE(PM_PWSTCTRL_MPU);
OMAP24XX_RESTORE(PM_PWSTCTRL_CORE);
OMAP24XX_RESTORE(PM_PWSTCTRL_GFX);
OMAP24XX_RESTORE(PM_PWSTCTRL_DSP);
OMAP24XX_RESTORE(PM_PWSTCTRL_MDM);
/* Restore idle state registers */
OMAP24XX_RESTORE(CM_IDLEST1_CORE);
OMAP24XX_RESTORE(CM_IDLEST2_CORE);
OMAP24XX_RESTORE(CM_IDLEST3_CORE);
OMAP24XX_RESTORE(CM_IDLEST4_CORE);
OMAP24XX_RESTORE(CM_IDLEST_GFX);
OMAP24XX_RESTORE(CM_IDLEST_WKUP);
OMAP24XX_RESTORE(CM_IDLEST_CKGEN);
OMAP24XX_RESTORE(CM_IDLEST_DSP);
OMAP24XX_RESTORE(CM_IDLEST_MDM);
/* Restore autoidle registers */
OMAP24XX_RESTORE(CM_AUTOIDLE1_CORE);
OMAP24XX_RESTORE(CM_AUTOIDLE2_CORE);
OMAP24XX_RESTORE(CM_AUTOIDLE3_CORE);
OMAP24XX_RESTORE(CM_AUTOIDLE4_CORE);
OMAP24XX_RESTORE(CM_AUTOIDLE_WKUP);
OMAP24XX_RESTORE(CM_AUTOIDLE_PLL);
OMAP24XX_RESTORE(CM_AUTOIDLE_DSP);
OMAP24XX_RESTORE(CM_AUTOIDLE_MDM);
/* Restore clock registers */
OMAP24XX_RESTORE(CM_FCLKEN1_CORE);
OMAP24XX_RESTORE(CM_FCLKEN2_CORE);
OMAP24XX_RESTORE(CM_ICLKEN1_CORE);
OMAP24XX_RESTORE(CM_ICLKEN2_CORE);
OMAP24XX_RESTORE(CM_ICLKEN3_CORE);
OMAP24XX_RESTORE(CM_ICLKEN4_CORE);
/* REVISIT: Clear interrupts here */
/* Restore interrupt registers */
OMAP24XX_RESTORE(INTC_MIR0);
OMAP24XX_RESTORE(INTC_MIR1);
OMAP24XX_RESTORE(INTC_MIR2);
}
static int omap2_pm_suspend(void)
{
int processor_type = 0;
/* REVISIT: 0x21 or 0x26? */
if (cpu_is_omap2420())
processor_type = 0x21;
if (!processor_type)
return -ENOTSUPP;
local_irq_disable();
local_fiq_disable();
omap2_pm_save_registers();
/* Disable interrupts except for the wake events */
INTC_MIR_SET0 = 0xffffffff & ~INT0_WAKE_MASK;
INTC_MIR_SET1 = 0xffffffff & ~INT1_WAKE_MASK;
INTC_MIR_SET2 = 0xffffffff & ~INT2_WAKE_MASK;
pmdomain_set_autoidle();
/* Clear old wake-up events */
PM_WKST1_CORE = 0;
PM_WKST2_CORE = 0;
PM_WKST_WKUP = 0;
/* Enable wake-up events */
PM_WKEN1_CORE = (1 << 22) | (1 << 21); /* UART1 & 2 */
PM_WKEN2_CORE = (1 << 2); /* UART3 */
PM_WKEN_WKUP = (1 << 2) | (1 << 0); /* GPIO & GPT1 */
/* Disable clocks except for CM_ICLKEN2_CORE. It gets disabled
* in the SRAM suspend code */
CM_FCLKEN1_CORE = 0;
CM_FCLKEN2_CORE = 0;
CM_ICLKEN1_CORE = 0;
CM_ICLKEN3_CORE = 0;
CM_ICLKEN4_CORE = 0;
omap2_pm_debug("Status before suspend");
/* Must wait for serial buffers to clear */
mdelay(200);
/* Jump to SRAM suspend code
* REVISIT: When is this SDRC_DLLB_CTRL?
*/
omap2_sram_suspend(SDRC_DLLA_CTRL, processor_type);
/* Back from sleep */
omap2_pm_restore_registers();
local_fiq_enable();
local_irq_enable();
return 0;
}
static int omap2_pm_enter(suspend_state_t state) static int omap2_pm_enter(suspend_state_t state)
{ {
int ret = 0;
switch (state) switch (state)
{ {
case PM_SUSPEND_STANDBY: case PM_SUSPEND_STANDBY:
case PM_SUSPEND_MEM: case PM_SUSPEND_MEM:
/* FIXME: Add suspend */ ret = omap2_pm_suspend();
break; break;
case PM_SUSPEND_DISK: case PM_SUSPEND_DISK:
return -ENOTSUPP; ret = -ENOTSUPP;
break;
default: default:
return -EINVAL; ret = -EINVAL;
} }
return 0; return ret;
} }
static int omap2_pm_finish(suspend_state_t state) static int omap2_pm_finish(suspend_state_t state)
...@@ -143,6 +400,8 @@ int __init omap2_pm_init(void) ...@@ -143,6 +400,8 @@ int __init omap2_pm_init(void)
pm_set_ops(&omap_pm_ops); pm_set_ops(&omap_pm_ops);
pm_idle = omap2_pm_idle; pm_idle = omap2_pm_idle;
pmdomain_init();
return 0; return 0;
} }
......
arch/arm/mach-omap2/timer-gp.c
View file @ a8c4c20d
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
* Copyright (C) 2005 Nokia Corporation * Copyright (C) 2005 Nokia Corporation
* Author: Paul Mundt <paul.mundt@nokia.com> * Author: Paul Mundt <paul.mundt@nokia.com>
* Juha Yrjl <juha.yrjola@nokia.com> * Juha Yrjl <juha.yrjola@nokia.com>
* OMAP Dual-mode timer framework support by Timo Teras
* *
* Some parts based off of TI's 24xx code: * Some parts based off of TI's 24xx code:
* *
...@@ -22,54 +23,18 @@ ...@@ -22,54 +23,18 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/delay.h>
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/delay.h> #include <asm/arch/dmtimer.h>
#include <asm/io.h>
#define OMAP2_GP_TIMER1_BASE 0x48028000 static struct omap_dm_timer *gptimer;
#define OMAP2_GP_TIMER2_BASE 0x4802a000
#define OMAP2_GP_TIMER3_BASE 0x48078000
#define OMAP2_GP_TIMER4_BASE 0x4807a000
#define GP_TIMER_TIDR 0x00 static inline void omap2_gp_timer_start(unsigned long load_val)
#define GP_TIMER_TISR 0x18
#define GP_TIMER_TIER 0x1c
#define GP_TIMER_TCLR 0x24
#define GP_TIMER_TCRR 0x28
#define GP_TIMER_TLDR 0x2c
#define GP_TIMER_TSICR 0x40
#define OS_TIMER_NR 1 /* GP timer 2 */
static unsigned long timer_base[] = {
IO_ADDRESS(OMAP2_GP_TIMER1_BASE),
IO_ADDRESS(OMAP2_GP_TIMER2_BASE),
IO_ADDRESS(OMAP2_GP_TIMER3_BASE),
IO_ADDRESS(OMAP2_GP_TIMER4_BASE),
};
static inline unsigned int timer_read_reg(int nr, unsigned int reg)
{
return __raw_readl(timer_base[nr] + reg);
}
static inline void timer_write_reg(int nr, unsigned int reg, unsigned int val)
{
__raw_writel(val, timer_base[nr] + reg);
}
/* Note that we always enable the clock prescale divider bit */
static inline void omap2_gp_timer_start(int nr, unsigned long load_val)
{ {
unsigned int tmp; omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val);
omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW);
tmp = 0xffffffff - load_val; omap_dm_timer_start(gptimer);
timer_write_reg(nr, GP_TIMER_TLDR, tmp);
timer_write_reg(nr, GP_TIMER_TCRR, tmp);
timer_write_reg(nr, GP_TIMER_TIER, 1 << 1);
timer_write_reg(nr, GP_TIMER_TCLR, (1 << 5) | (1 << 1) | 1);
} }
static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
...@@ -77,7 +42,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, ...@@ -77,7 +42,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
{ {
write_seqlock(&xtime_lock); write_seqlock(&xtime_lock);
timer_write_reg(OS_TIMER_NR, GP_TIMER_TISR, 1 << 1); omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW);
timer_tick(regs); timer_tick(regs);
write_sequnlock(&xtime_lock); write_sequnlock(&xtime_lock);
...@@ -87,41 +52,26 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id, ...@@ -87,41 +52,26 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id,
static struct irqaction omap2_gp_timer_irq = { static struct irqaction omap2_gp_timer_irq = {
.name = "gp timer", .name = "gp timer",
.flags = SA_INTERRUPT, .flags = SA_INTERRUPT | SA_TIMER,
.handler = omap2_gp_timer_interrupt, .handler = omap2_gp_timer_interrupt,
}; };
static void __init omap2_gp_timer_init(void) static void __init omap2_gp_timer_init(void)
{ {
struct clk * sys_ck; u32 tick_period;
u32 tick_period = 120000;
u32 l;
/* Reset clock and prescale value */ omap_dm_timer_init();
timer_write_reg(OS_TIMER_NR, GP_TIMER_TCLR, 0); gptimer = omap_dm_timer_request_specific(1);
BUG_ON(gptimer == NULL);
sys_ck = clk_get(NULL, "sys_ck"); omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
if (IS_ERR(sys_ck)) tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / 100;
printk(KERN_ERR "Could not get sys_ck\n");
else {
clk_enable(sys_ck);
tick_period = clk_get_rate(sys_ck) / 100;
clk_put(sys_ck);
}
tick_period /= 2; /* Minimum prescale divider is 2 */
tick_period -= 1; tick_period -= 1;
l = timer_read_reg(OS_TIMER_NR, GP_TIMER_TIDR); setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq);
printk(KERN_INFO "OMAP2 GP timer (HW version %d.%d)\n", omap2_gp_timer_start(tick_period);
(l >> 4) & 0x0f, l & 0x0f);
setup_irq(38, &omap2_gp_timer_irq);
omap2_gp_timer_start(OS_TIMER_NR, tick_period);
} }
struct sys_timer omap_timer = { struct sys_timer omap_timer = {
.init = omap2_gp_timer_init, .init = omap2_gp_timer_init,
}; };
arch/arm/mach-pxa/Kconfig
View file @ a8c4c20d
...@@ -35,6 +35,10 @@ config PXA_SHARPSL ...@@ -35,6 +35,10 @@ config PXA_SHARPSL
SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa)
handheld computer. handheld computer.
config MACH_TRIZEPS4
bool "Keith und Koep Trizeps4 DIMM-Module"
select PXA27x
endchoice endchoice
if PXA_SHARPSL if PXA_SHARPSL
...@@ -55,6 +59,21 @@ endchoice ...@@ -55,6 +59,21 @@ endchoice
endif endif
if MACH_TRIZEPS4
choice
prompt "Select base board for Trizeps 4 module"
config MACH_TRIZEPS4_CONXS
bool "ConXS Eval Board"
config MACH_TRIZEPS4_ANY
bool "another Board"
endchoice
endif
endmenu endmenu
config MACH_POODLE config MACH_POODLE
......
arch/arm/mach-pxa/Makefile
View file @ a8c4c20d
...@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o ...@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o
obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o
obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o
...@@ -23,6 +24,7 @@ led-y := leds.o ...@@ -23,6 +24,7 @@ led-y := leds.o
led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbock.o
led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
obj-$(CONFIG_LEDS) += $(led-y) obj-$(CONFIG_LEDS) += $(led-y)
......
arch/arm/mach-pxa/leds-trizeps4.c 0 → 100644
View file @ a8c4c20d
/*
* linux/arch/arm/mach-pxa/leds-trizeps4.c
*
* Author: Jürgen Schindele
* Created: 20 02, 2006
* Copyright: Jürgen Schindele
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/config.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/system.h>
#include <asm/types.h>
#include <asm/leds.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/trizeps4.h>
#include "leds.h"
#define LED_STATE_ENABLED 1
#define LED_STATE_CLAIMED 2
#define SYS_BUSY 0x01
#define HEARTBEAT 0x02
#define BLINK 0x04
static unsigned int led_state;
static unsigned int hw_led_state;
void trizeps4_leds_event(led_event_t evt)
{
unsigned long flags;
local_irq_save(flags);
switch (evt) {
case led_start:
hw_led_state = 0;
pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
led_state = LED_STATE_ENABLED;
break;
case led_stop:
led_state &= ~LED_STATE_ENABLED;
break;
case led_claim:
led_state |= LED_STATE_CLAIMED;
hw_led_state = 0;
break;
case led_release:
led_state &= ~LED_STATE_CLAIMED;
hw_led_state = 0;
break;
#ifdef CONFIG_LEDS_TIMER
case led_timer:
hw_led_state ^= HEARTBEAT;
break;
#endif
#ifdef CONFIG_LEDS_CPU
case led_idle_start:
hw_led_state &= ~SYS_BUSY;
break;
case led_idle_end:
hw_led_state |= SYS_BUSY;
break;
#endif
case led_halted:
break;
case led_green_on:
hw_led_state |= BLINK;
break;
case led_green_off:
hw_led_state &= ~BLINK;
break;
case led_amber_on:
break;
case led_amber_off:
break;
case led_red_on:
break;
case led_red_off:
break;
default:
break;
}
if (led_state & LED_STATE_ENABLED) {
switch (hw_led_state) {
case 0:
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 1:
GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 2:
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
case 3:
GPCR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPCR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
break;
}
}
else {
/* turn all off */
GPSR(GPIO_SYS_BUSY_LED) |= GPIO_bit(GPIO_SYS_BUSY_LED);
GPSR(GPIO_HEARTBEAT_LED) |= GPIO_bit(GPIO_HEARTBEAT_LED);
}
local_irq_restore(flags);
}
arch/arm/mach-pxa/leds.c
View file @ a8c4c20d
...@@ -24,6 +24,8 @@ pxa_leds_init(void) ...@@ -24,6 +24,8 @@ pxa_leds_init(void)
leds_event = mainstone_leds_event; leds_event = mainstone_leds_event;
if (machine_is_pxa_idp()) if (machine_is_pxa_idp())
leds_event = idp_leds_event; leds_event = idp_leds_event;
if (machine_is_trizeps4())
leds_event = trizeps4_leds_event;
leds_event(led_start); leds_event(led_start);
return 0; return 0;
......
arch/arm/mach-pxa/leds.h
View file @ a8c4c20d
...@@ -10,3 +10,4 @@ ...@@ -10,3 +10,4 @@
extern void idp_leds_event(led_event_t evt); extern void idp_leds_event(led_event_t evt);
extern void lubbock_leds_event(led_event_t evt); extern void lubbock_leds_event(led_event_t evt);
extern void mainstone_leds_event(led_event_t evt); extern void mainstone_leds_event(led_event_t evt);
extern void trizeps4_leds_event(led_event_t evt);
arch/arm/mach-pxa/lpd270.c
View file @ a8c4c20d
...@@ -248,58 +248,137 @@ static void lpd270_backlight_power(int on) ...@@ -248,58 +248,137 @@ static void lpd270_backlight_power(int on)
/* 5.7" TFT QVGA (LoLo display number 1) */ /* 5.7" TFT QVGA (LoLo display number 1) */
static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = { static struct pxafb_mach_info sharp_lq057q3dc02 __initdata = {
.pixclock = 100000, .pixclock = 150000,
.xres = 240, .xres = 320,
.yres = 320, .yres = 240,
.bpp = 16, .bpp = 16,
.hsync_len = 64, .hsync_len = 0x14,
.left_margin = 0x27, .left_margin = 0x28,
.right_margin = 0x09, .right_margin = 0x0a,
.vsync_len = 0x04, .vsync_len = 0x02,
.upper_margin = 0x08, .upper_margin = 0x08,
.lower_margin = 0x14, .lower_margin = 0x14,
.sync = 0, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400007, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 12.1" TFT SVGA (LoLo display number 2) */
static struct pxafb_mach_info sharp_lq121s1dg31 __initdata = {
.pixclock = 50000,
.xres = 800,
.yres = 600,
.bpp = 16,
.hsync_len = 0x05,
.left_margin = 0x52,
.right_margin = 0x05,
.vsync_len = 0x04,
.upper_margin = 0x14,
.lower_margin = 0x0a,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 3.6" TFT QVGA (LoLo display number 3) */
static struct pxafb_mach_info sharp_lq036q1da01 __initdata = {
.pixclock = 150000,
.xres = 320,
.yres = 240,
.bpp = 16,
.hsync_len = 0x0e,
.left_margin = 0x04,
.right_margin = 0x0a,
.vsync_len = 0x03,
.upper_margin = 0x03,
.lower_margin = 0x03,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
/* 6.4" TFT VGA (LoLo display number 5) */ /* 6.4" TFT VGA (LoLo display number 5) */
static struct pxafb_mach_info sharp_lq64d343 __initdata = { static struct pxafb_mach_info sharp_lq64d343 __initdata = {
.pixclock = 20000, .pixclock = 25000,
.xres = 640, .xres = 640,
.yres = 480, .yres = 480,
.bpp = 16, .bpp = 16,
.hsync_len = 49, .hsync_len = 0x31,
.left_margin = 0x89, .left_margin = 0x89,
.right_margin = 0x19, .right_margin = 0x19,
.vsync_len = 18, .vsync_len = 0x12,
.upper_margin = 0x22, .upper_margin = 0x22,
.lower_margin = 0, .lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400001, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power,
};
/* 10.4" TFT VGA (LoLo display number 7) */
static struct pxafb_mach_info sharp_lq10d368 __initdata = {
.pixclock = 25000,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 0x31,
.left_margin = 0x89,
.right_margin = 0x19,
.vsync_len = 0x12,
.upper_margin = 0x22,
.lower_margin = 0x00,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080,
.lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
/* 3.5" TFT QVGA (LoLo display number 8) */ /* 3.5" TFT QVGA (LoLo display number 8) */
static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = { static struct pxafb_mach_info sharp_lq035q7db02_20 __initdata = {
.pixclock = 100000, .pixclock = 150000,
.xres = 240, .xres = 240,
.yres = 320, .yres = 320,
.bpp = 16, .bpp = 16,
.hsync_len = 0x34, .hsync_len = 0x0e,
.left_margin = 0x09, .left_margin = 0x0a,
.right_margin = 0x09, .right_margin = 0x0a,
.vsync_len = 0x08, .vsync_len = 0x03,
.upper_margin = 0x05, .upper_margin = 0x05,
.lower_margin = 0x14, .lower_margin = 0x14,
.sync = 0, .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
.lccr0 = 0x07800080, .lccr0 = 0x07800080,
.lccr3 = 0x04400007, .lccr3 = 0x00400000,
.pxafb_backlight_power = lpd270_backlight_power, .pxafb_backlight_power = lpd270_backlight_power,
}; };
static struct pxafb_mach_info *lpd270_lcd_to_use;
static int __init lpd270_set_lcd(char *str)
{
if (!strnicmp(str, "lq057q3dc02", 11)) {
lpd270_lcd_to_use = &sharp_lq057q3dc02;
} else if (!strnicmp(str, "lq121s1dg31", 11)) {
lpd270_lcd_to_use = &sharp_lq121s1dg31;
} else if (!strnicmp(str, "lq036q1da01", 11)) {
lpd270_lcd_to_use = &sharp_lq036q1da01;
} else if (!strnicmp(str, "lq64d343", 8)) {
lpd270_lcd_to_use = &sharp_lq64d343;
} else if (!strnicmp(str, "lq10d368", 8)) {
lpd270_lcd_to_use = &sharp_lq10d368;
} else if (!strnicmp(str, "lq035q7db02-20", 14)) {
lpd270_lcd_to_use = &sharp_lq035q7db02_20;
} else {
printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
}
return 1;
}
__setup("lcd=", lpd270_set_lcd);
static struct platform_device *platform_devices[] __initdata = { static struct platform_device *platform_devices[] __initdata = {
&smc91x_device, &smc91x_device,
&lpd270_audio_device, &lpd270_audio_device,
...@@ -345,9 +424,8 @@ static void __init lpd270_init(void) ...@@ -345,9 +424,8 @@ static void __init lpd270_init(void)
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
// set_pxa_fb_info(&sharp_lq057q3dc02); if (lpd270_lcd_to_use != NULL)
set_pxa_fb_info(&sharp_lq64d343); set_pxa_fb_info(lpd270_lcd_to_use);
// set_pxa_fb_info(&sharp_lq035q7db02_20);
pxa_set_ohci_info(&lpd270_ohci_platform_data); pxa_set_ohci_info(&lpd270_ohci_platform_data);
} }
......
arch/arm/mach-pxa/trizeps4.c 0 → 100644
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arch/arm/mach-sa1100/cpu-sa1110.c
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arch/arm/mm/Kconfig
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...@@ -121,8 +121,8 @@ config CPU_ARM925T ...@@ -121,8 +121,8 @@ config CPU_ARM925T
# ARM926T # ARM926T
config CPU_ARM926T config CPU_ARM926T
bool "Support ARM926T processor" bool "Support ARM926T processor"
depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
select CPU_32v5 select CPU_32v5
select CPU_ABRT_EV5TJ select CPU_ABRT_EV5TJ
select CPU_CACHE_VIVT select CPU_CACHE_VIVT
......
arch/arm/mm/ioremap.c
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arch/arm/mm/mm-armv.c
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...@@ -302,16 +302,16 @@ static struct mem_types mem_types[] __initdata = { ...@@ -302,16 +302,16 @@ static struct mem_types mem_types[] __initdata = {
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
L_PTE_WRITE, L_PTE_WRITE,
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
PMD_SECT_AP_WRITE, PMD_SECT_AP_WRITE,
.domain = DOMAIN_IO, .domain = DOMAIN_IO,
}, },
[MT_CACHECLEAN] = { [MT_CACHECLEAN] = {
.prot_sect = PMD_TYPE_SECT, .prot_sect = PMD_TYPE_SECT | PMD_BIT4,
.domain = DOMAIN_KERNEL, .domain = DOMAIN_KERNEL,
}, },
[MT_MINICLEAN] = { [MT_MINICLEAN] = {
.prot_sect = PMD_TYPE_SECT | PMD_SECT_MINICACHE, .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_MINICACHE,
.domain = DOMAIN_KERNEL, .domain = DOMAIN_KERNEL,
}, },
[MT_LOW_VECTORS] = { [MT_LOW_VECTORS] = {
...@@ -327,25 +327,25 @@ static struct mem_types mem_types[] __initdata = { ...@@ -327,25 +327,25 @@ static struct mem_types mem_types[] __initdata = {
.domain = DOMAIN_USER, .domain = DOMAIN_USER,
}, },
[MT_MEMORY] = { [MT_MEMORY] = {
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL, .domain = DOMAIN_KERNEL,
}, },
[MT_ROM] = { [MT_ROM] = {
.prot_sect = PMD_TYPE_SECT, .prot_sect = PMD_TYPE_SECT | PMD_BIT4,
.domain = DOMAIN_KERNEL, .domain = DOMAIN_KERNEL,
}, },
[MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */
.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
L_PTE_WRITE, L_PTE_WRITE,
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_UNCACHED | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_UNCACHED |
PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE |
PMD_SECT_TEX(1), PMD_SECT_TEX(1),
.domain = DOMAIN_IO, .domain = DOMAIN_IO,
}, },
[MT_NONSHARED_DEVICE] = { [MT_NONSHARED_DEVICE] = {
.prot_l1 = PMD_TYPE_TABLE, .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_NONSHARED_DEV | .prot_sect = PMD_TYPE_SECT | PMD_BIT4 | PMD_SECT_NONSHARED_DEV |
PMD_SECT_AP_WRITE, PMD_SECT_AP_WRITE,
.domain = DOMAIN_IO, .domain = DOMAIN_IO,
} }
...@@ -375,14 +375,21 @@ void __init build_mem_type_table(void) ...@@ -375,14 +375,21 @@ void __init build_mem_type_table(void)
ecc_mask = 0; ecc_mask = 0;
} }
if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) { /*
for (i = 0; i < ARRAY_SIZE(mem_types); i++) { * Xscale must not have PMD bit 4 set for section mappings.
*/
if (cpu_is_xscale())
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
mem_types[i].prot_sect &= ~PMD_BIT4;
/*
* ARMv5 and lower, excluding Xscale, bit 4 must be set for
* page tables.
*/
if (cpu_arch < CPU_ARCH_ARMv6 && !cpu_is_xscale())
for (i = 0; i < ARRAY_SIZE(mem_types); i++)
if (mem_types[i].prot_l1) if (mem_types[i].prot_l1)
mem_types[i].prot_l1 |= PMD_BIT4; mem_types[i].prot_l1 |= PMD_BIT4;
if (mem_types[i].prot_sect)
mem_types[i].prot_sect |= PMD_BIT4;
}
}
cp = &cache_policies[cachepolicy]; cp = &cache_policies[cachepolicy];
kern_pgprot = user_pgprot = cp->pte; kern_pgprot = user_pgprot = cp->pte;
...@@ -406,8 +413,8 @@ void __init build_mem_type_table(void) ...@@ -406,8 +413,8 @@ void __init build_mem_type_table(void)
* bit 4 becomes XN which we must clear for the * bit 4 becomes XN which we must clear for the
* kernel memory mapping. * kernel memory mapping.
*/ */
mem_types[MT_MEMORY].prot_sect &= ~PMD_BIT4; mem_types[MT_MEMORY].prot_sect &= ~PMD_SECT_XN;
mem_types[MT_ROM].prot_sect &= ~PMD_BIT4; mem_types[MT_ROM].prot_sect &= ~PMD_SECT_XN;
/* /*
* Mark cache clean areas and XIP ROM read only * Mark cache clean areas and XIP ROM read only
......
arch/arm/mm/proc-arm1020.S
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arch/arm/mm/proc-macros.S
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...@@ -49,3 +49,13 @@ ...@@ -49,3 +49,13 @@
.macro asid, rd, rn .macro asid, rd, rn
and \rd, \rn, #255 and \rd, \rn, #255
.endm .endm
.macro crval, clear, mmuset, ucset
#ifdef CONFIG_MMU
.word \clear
.word \mmuset
#else
.word \clear
.word \ucset
#endif
.endm
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arch/arm/plat-omap/Kconfig
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