Commit a9da58c8 authored by Erico Nunes's avatar Erico Nunes Committed by Qiang Yu

drm/lima: set pp bus_stop bit before hard reset

This is required for reliable hard resets. Otherwise, doing a hard reset
while a task is still running (such as a task which is being stopped by
the drm_sched timeout handler) may result in random mmu write timeouts
or lockups which cause the entire gpu to hang.
Signed-off-by: default avatarErico Nunes <nunes.erico@gmail.com>
Reviewed-by: default avatarVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: default avatarQiang Yu <yuq825@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240124025947.2110659-4-nunes.erico@gmail.com
parent 2ccd4adc
......@@ -168,6 +168,11 @@ static void lima_pp_write_frame(struct lima_ip *ip, u32 *frame, u32 *wb)
}
}
static int lima_pp_bus_stop_poll(struct lima_ip *ip)
{
return !!(pp_read(LIMA_PP_STATUS) & LIMA_PP_STATUS_BUS_STOPPED);
}
static int lima_pp_hard_reset_poll(struct lima_ip *ip)
{
pp_write(LIMA_PP_PERF_CNT_0_LIMIT, 0xC01A0000);
......@@ -181,6 +186,14 @@ static int lima_pp_hard_reset(struct lima_ip *ip)
pp_write(LIMA_PP_PERF_CNT_0_LIMIT, 0xC0FFE000);
pp_write(LIMA_PP_INT_MASK, 0);
pp_write(LIMA_PP_CTRL, LIMA_PP_CTRL_STOP_BUS);
ret = lima_poll_timeout(ip, lima_pp_bus_stop_poll, 10, 100);
if (ret) {
dev_err(dev->dev, "pp %s bus stop timeout\n", lima_ip_name(ip));
return ret;
}
pp_write(LIMA_PP_CTRL, LIMA_PP_CTRL_FORCE_RESET);
ret = lima_poll_timeout(ip, lima_pp_hard_reset_poll, 10, 100);
if (ret) {
......
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