Commit a9f2976f authored by Ramya Gnanasekar's avatar Ramya Gnanasekar Committed by Kalle Valo

wifi: ath12k: Dump additional Tx PDEV HTT stats

Support to dump additional Tx PDEV stats through HTT stats debugfs.
Following stats dump are supported:
        1. PDEV control path stat to dump Tx management frame count
        2. Tx PDEV SIFS histogram stats
        3. Tx MU MIMO PPDU stats for 802.11ac, 802.11ax and 802.11be

Sample Output:
---------------
echo 1 > /sys/kernel/debug/ath12k/pci-0000\:06\:00.0/mac0/htt_stats_type
cat /sys/kernel/debug/ath12k/pci-0000\:06\:00.0/mac0/htt_stats

HTT_TX_PDEV_STATS_CMN_TLV:
mac_id = 0
comp_delivered = 0
self_triggers = 13
......
......
HTT_TX_PDEV_STATS_CTRL_PATH_TX_STATS:
fw_tx_mgmt_subtype =  0:1, 1:0, 2:0, 3:0, 4:38, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:1, 12:0, 13:7, 14:0, 15:0

HTT_TX_PDEV_STATS_SIFS_HIST_TLV:
sifs_hist_status =  0:237, 1:185, 2:1, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0

HTT_TX_PDEV_AC_MU_PPDU_DISTRIBUTION_STATS:
ac_mu_mimo_num_seq_posted_nr4 = 0
ac_mu_mimo_num_ppdu_posted_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ac_mu_mimo_num_ppdu_completed_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ac_mu_mimo_num_seq_term_status_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

ac_mu_mimo_num_seq_posted_nr8 = 0
ac_mu_mimo_num_ppdu_posted_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ac_mu_mimo_num_ppdu_completed_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ac_mu_mimo_num_seq_term_status_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

HTT_TX_PDEV_AX_MU_PPDU_DISTRIBUTION_STATS:
ax_mu_mimo_num_seq_posted_nr4 = 0
ax_mu_mimo_num_ppdu_posted_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ax_mu_mimo_num_ppdu_completed_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ax_mu_mimo_num_seq_term_status_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

ax_mu_mimo_num_seq_posted_nr8 = 0
ax_mu_mimo_num_ppdu_posted_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ax_mu_mimo_num_ppdu_completed_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
ax_mu_mimo_num_seq_term_status_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

HTT_TX_PDEV_BE_MU_PPDU_DISTRIBUTION_STATS:
be_mu_mimo_num_seq_posted_nr4 = 0
be_mu_mimo_num_ppdu_posted_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
be_mu_mimo_num_ppdu_completed_per_burst_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
be_mu_mimo_num_seq_term_status_nr4 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

be_mu_mimo_num_seq_posted_nr8 = 0
be_mu_mimo_num_ppdu_posted_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
be_mu_mimo_num_ppdu_completed_per_burst_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0
be_mu_mimo_num_seq_term_status_nr8 =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0

Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1
Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
Signed-off-by: default avatarRamya Gnanasekar <quic_rgnanase@quicinc.com>
Acked-by: default avatarJeff Johnson <quic_jjohnson@quicinc.com>
Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
Link: https://patch.msgid.link/20240626085854.2500681-5-quic_rgnanase@quicinc.com
parent adf6df96
......@@ -253,6 +253,139 @@ htt_print_tx_pdev_stats_sifs_tlv(const void *tag_buf,
stats_req->buf_len = len;
}
static void
htt_print_tx_pdev_mu_ppdu_dist_stats_tlv(const void *tag_buf, u16 tag_len,
struct debug_htt_stats_req *stats_req)
{
const struct ath12k_htt_tx_pdev_mu_ppdu_dist_stats_tlv *htt_stats_buf = tag_buf;
char *mode;
u8 j, hw_mode, i, str_buf_len;
u8 *buf = stats_req->buf;
u32 len = stats_req->buf_len;
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
u32 stats_value;
u8 max_ppdu = ATH12K_HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST;
u8 max_sched = ATH12K_HTT_STATS_MAX_NUM_SCHED_STATUS;
char str_buf[ATH12K_HTT_MAX_STRING_LEN];
if (tag_len < sizeof(*htt_stats_buf))
return;
hw_mode = le32_to_cpu(htt_stats_buf->hw_mode);
switch (hw_mode) {
case ATH12K_HTT_STATS_HWMODE_AC:
len += scnprintf(buf + len, buf_len - len,
"HTT_TX_PDEV_AC_MU_PPDU_DISTRIBUTION_STATS:\n");
mode = "ac";
break;
case ATH12K_HTT_STATS_HWMODE_AX:
len += scnprintf(buf + len, buf_len - len,
"HTT_TX_PDEV_AX_MU_PPDU_DISTRIBUTION_STATS:\n");
mode = "ax";
break;
case ATH12K_HTT_STATS_HWMODE_BE:
len += scnprintf(buf + len, buf_len - len,
"HTT_TX_PDEV_BE_MU_PPDU_DISTRIBUTION_STATS:\n");
mode = "be";
break;
default:
return;
}
for (i = 0; i < ATH12K_HTT_STATS_NUM_NR_BINS ; i++) {
len += scnprintf(buf + len, buf_len - len,
"%s_mu_mimo_num_seq_posted_nr%u = %u\n", mode,
((i + 1) * 4), htt_stats_buf->num_seq_posted[i]);
str_buf_len = 0;
memset(str_buf, 0x0, sizeof(str_buf));
for (j = 0; j < ATH12K_HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST ; j++) {
stats_value = le32_to_cpu(htt_stats_buf->num_ppdu_posted_per_burst
[i * max_ppdu + j]);
str_buf_len += scnprintf(&str_buf[str_buf_len],
ATH12K_HTT_MAX_STRING_LEN - str_buf_len,
" %u:%u,", j, stats_value);
}
/* To overwrite the last trailing comma */
str_buf[str_buf_len - 1] = '\0';
len += scnprintf(buf + len, buf_len - len,
"%s_mu_mimo_num_ppdu_posted_per_burst_nr%u = %s\n",
mode, ((i + 1) * 4), str_buf);
str_buf_len = 0;
memset(str_buf, 0x0, sizeof(str_buf));
for (j = 0; j < ATH12K_HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST ; j++) {
stats_value = le32_to_cpu(htt_stats_buf->num_ppdu_cmpl_per_burst
[i * max_ppdu + j]);
str_buf_len += scnprintf(&str_buf[str_buf_len],
ATH12K_HTT_MAX_STRING_LEN - str_buf_len,
" %u:%u,", j, stats_value);
}
/* To overwrite the last trailing comma */
str_buf[str_buf_len - 1] = '\0';
len += scnprintf(buf + len, buf_len - len,
"%s_mu_mimo_num_ppdu_completed_per_burst_nr%u = %s\n",
mode, ((i + 1) * 4), str_buf);
str_buf_len = 0;
memset(str_buf, 0x0, sizeof(str_buf));
for (j = 0; j < ATH12K_HTT_STATS_MAX_NUM_SCHED_STATUS ; j++) {
stats_value = le32_to_cpu(htt_stats_buf->num_seq_term_status
[i * max_sched + j]);
str_buf_len += scnprintf(&str_buf[str_buf_len],
ATH12K_HTT_MAX_STRING_LEN - str_buf_len,
" %u:%u,", j, stats_value);
}
/* To overwrite the last trailing comma */
str_buf[str_buf_len - 1] = '\0';
len += scnprintf(buf + len, buf_len - len,
"%s_mu_mimo_num_seq_term_status_nr%u = %s\n\n",
mode, ((i + 1) * 4), str_buf);
}
stats_req->buf_len = len;
}
static void
htt_print_tx_pdev_stats_sifs_hist_tlv(const void *tag_buf,
u16 tag_len,
struct debug_htt_stats_req *stats_req)
{
const struct ath12k_htt_tx_pdev_stats_sifs_hist_tlv *htt_stats_buf = tag_buf;
u8 *buf = stats_req->buf;
u32 len = stats_req->buf_len;
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
u16 num_elems = min_t(u16, (tag_len >> 2),
ATH12K_HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS);
len += scnprintf(buf + len, buf_len - len,
"HTT_TX_PDEV_STATS_SIFS_HIST_TLV:\n");
len += print_array_to_buf(buf, len, "sifs_hist_status",
htt_stats_buf->sifs_hist_status, num_elems, "\n\n");
stats_req->buf_len = len;
}
static void
htt_print_pdev_ctrl_path_tx_stats_tlv(const void *tag_buf, u16 tag_len,
struct debug_htt_stats_req *stats_req)
{
const struct ath12k_htt_pdev_ctrl_path_tx_stats_tlv *htt_stats_buf = tag_buf;
u8 *buf = stats_req->buf;
u32 len = stats_req->buf_len;
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
if (len < sizeof(*htt_stats_buf))
return;
len += scnprintf(buf + len, buf_len - len,
"HTT_TX_PDEV_STATS_CTRL_PATH_TX_STATS:\n");
len += print_array_to_buf(buf, len, "fw_tx_mgmt_subtype",
htt_stats_buf->fw_tx_mgmt_subtype,
ATH12K_HTT_STATS_SUBTYPE_MAX, "\n\n");
stats_req->buf_len = len;
}
static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
u16 tag, u16 len, const void *tag_buf,
void *user_data)
......@@ -272,6 +405,15 @@ static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
case HTT_STATS_TX_PDEV_FLUSH_TAG:
htt_print_tx_pdev_stats_flush_tlv(tag_buf, len, stats_req);
break;
case HTT_STATS_TX_PDEV_SIFS_HIST_TAG:
htt_print_tx_pdev_stats_sifs_hist_tlv(tag_buf, len, stats_req);
break;
case HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG:
htt_print_pdev_ctrl_path_tx_stats_tlv(tag_buf, len, stats_req);
break;
case HTT_STATS_MU_PPDU_DIST_TAG:
htt_print_tx_pdev_mu_ppdu_dist_stats_tlv(tag_buf, len, stats_req);
break;
default:
break;
}
......
......@@ -11,6 +11,8 @@
#define ATH12K_HTT_STATS_COOKIE_LSB GENMASK_ULL(31, 0)
#define ATH12K_HTT_STATS_COOKIE_MSB GENMASK_ULL(63, 32)
#define ATH12K_HTT_STATS_MAGIC_VALUE 0xF0F0F0F0
#define ATH12K_HTT_STATS_SUBTYPE_MAX 16
#define ATH12K_HTT_MAX_STRING_LEN 256
#define ATH12K_HTT_STATS_RESET_BITMAP32_OFFSET(_idx) ((_idx) & 0x1f)
#define ATH12K_HTT_STATS_RESET_BITMAP64_OFFSET(_idx) ((_idx) & 0x3f)
......@@ -133,6 +135,9 @@ enum ath12k_dbg_htt_tlv_tag {
HTT_STATS_TX_PDEV_UNDERRUN_TAG = 1,
HTT_STATS_TX_PDEV_SIFS_TAG = 2,
HTT_STATS_TX_PDEV_FLUSH_TAG = 3,
HTT_STATS_TX_PDEV_SIFS_HIST_TAG = 67,
HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG = 102,
HTT_STATS_MU_PPDU_DIST_TAG = 129,
HTT_STATS_MAX_TAG,
};
......@@ -142,6 +147,18 @@ enum ath12k_dbg_htt_tlv_tag {
#define ATH12K_HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
#define ATH12K_HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 150
/* MU MIMO distribution stats is a 2-dimensional array
* with dimension one denoting stats for nr4[0] or nr8[1]
*/
#define ATH12K_HTT_STATS_NUM_NR_BINS 2
#define ATH12K_HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST 10
#define ATH12K_HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
#define ATH12K_HTT_STATS_MAX_NUM_SCHED_STATUS 9
#define ATH12K_HTT_STATS_NUM_SCHED_STATUS_WORDS \
(ATH12K_HTT_STATS_NUM_NR_BINS * ATH12K_HTT_STATS_MAX_NUM_SCHED_STATUS)
#define ATH12K_HTT_STATS_MU_PPDU_PER_BURST_WORDS \
(ATH12K_HTT_STATS_NUM_NR_BINS * ATH12K_HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST)
enum ath12k_htt_tx_pdev_underrun_enum {
HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
......@@ -258,4 +275,26 @@ struct ath12k_htt_tx_pdev_stats_sifs_tlv {
DECLARE_FLEX_ARRAY(__le32, sifs_status);
} __packed;
struct ath12k_htt_pdev_ctrl_path_tx_stats_tlv {
__le32 fw_tx_mgmt_subtype[ATH12K_HTT_STATS_SUBTYPE_MAX];
} __packed;
struct ath12k_htt_tx_pdev_stats_sifs_hist_tlv {
DECLARE_FLEX_ARRAY(__le32, sifs_hist_status);
} __packed;
enum ath12k_htt_stats_hw_mode {
ATH12K_HTT_STATS_HWMODE_AC = 0,
ATH12K_HTT_STATS_HWMODE_AX = 1,
ATH12K_HTT_STATS_HWMODE_BE = 2,
};
struct ath12k_htt_tx_pdev_mu_ppdu_dist_stats_tlv {
__le32 hw_mode;
__le32 num_seq_term_status[ATH12K_HTT_STATS_NUM_SCHED_STATUS_WORDS];
__le32 num_ppdu_cmpl_per_burst[ATH12K_HTT_STATS_MU_PPDU_PER_BURST_WORDS];
__le32 num_seq_posted[ATH12K_HTT_STATS_NUM_NR_BINS];
__le32 num_ppdu_posted_per_burst[ATH12K_HTT_STATS_MU_PPDU_PER_BURST_WORDS];
} __packed;
#endif
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