Commit aa08b940 authored by Sébastien Szymanski's avatar Sébastien Szymanski Committed by Greg Kroah-Hartman

ARM: dts: imx6ul: fix PWM[1-4] interrupts

[ Upstream commit 3cf10132 ]

According to the i.MX6UL/L RM, table 3.1 "ARM Cortex A7 domain interrupt
summary", the interrupts for the PWM[1-4] go from 83 to 86.

Fixes: b9901fe8 ("ARM: dts: imx6ul: add pwm[1-4] nodes")
Signed-off-by: default avatarSébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 1bca8f45
...@@ -358,7 +358,7 @@ tsc: tsc@2040000 { ...@@ -358,7 +358,7 @@ tsc: tsc@2040000 {
pwm1: pwm@2080000 { pwm1: pwm@2080000 {
compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
reg = <0x02080000 0x4000>; reg = <0x02080000 0x4000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_PWM1>, clocks = <&clks IMX6UL_CLK_PWM1>,
<&clks IMX6UL_CLK_PWM1>; <&clks IMX6UL_CLK_PWM1>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
...@@ -369,7 +369,7 @@ pwm1: pwm@2080000 { ...@@ -369,7 +369,7 @@ pwm1: pwm@2080000 {
pwm2: pwm@2084000 { pwm2: pwm@2084000 {
compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
reg = <0x02084000 0x4000>; reg = <0x02084000 0x4000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_PWM2>, clocks = <&clks IMX6UL_CLK_PWM2>,
<&clks IMX6UL_CLK_PWM2>; <&clks IMX6UL_CLK_PWM2>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
...@@ -380,7 +380,7 @@ pwm2: pwm@2084000 { ...@@ -380,7 +380,7 @@ pwm2: pwm@2084000 {
pwm3: pwm@2088000 { pwm3: pwm@2088000 {
compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
reg = <0x02088000 0x4000>; reg = <0x02088000 0x4000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_PWM3>, clocks = <&clks IMX6UL_CLK_PWM3>,
<&clks IMX6UL_CLK_PWM3>; <&clks IMX6UL_CLK_PWM3>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
...@@ -391,7 +391,7 @@ pwm3: pwm@2088000 { ...@@ -391,7 +391,7 @@ pwm3: pwm@2088000 {
pwm4: pwm@208c000 { pwm4: pwm@208c000 {
compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
reg = <0x0208c000 0x4000>; reg = <0x0208c000 0x4000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_PWM4>, clocks = <&clks IMX6UL_CLK_PWM4>,
<&clks IMX6UL_CLK_PWM4>; <&clks IMX6UL_CLK_PWM4>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
......
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