Commit aa8f1adc authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Revert "drm/i915: Do not rely on wm preservation for ILK watermarks"

This reverts commit 7de69478 which is
commit 8777b927 upstream.

It was reported to cause flickering and other regressions.
Reported-by: default avatarRainer Fiebig <jrf@mailbox.org>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>

reverted:
parent 2a39eae0
...@@ -457,6 +457,7 @@ struct intel_crtc_scaler_state { ...@@ -457,6 +457,7 @@ struct intel_crtc_scaler_state {
struct intel_pipe_wm { struct intel_pipe_wm {
struct intel_wm_level wm[5]; struct intel_wm_level wm[5];
struct intel_wm_level raw_wm[5];
uint32_t linetime; uint32_t linetime;
bool fbc_wm_enabled; bool fbc_wm_enabled;
bool pipe_enabled; bool pipe_enabled;
......
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#include <linux/cpufreq.h> #include <linux/cpufreq.h>
#include <drm/drm_plane_helper.h> #include <drm/drm_plane_helper.h>
#include <drm/drm_atomic_helper.h>
#include "i915_drv.h" #include "i915_drv.h"
#include "intel_drv.h" #include "intel_drv.h"
#include "../../../platform/x86/intel_ips.h" #include "../../../platform/x86/intel_ips.h"
...@@ -2018,9 +2017,9 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv, ...@@ -2018,9 +2017,9 @@ static void ilk_compute_wm_level(const struct drm_i915_private *dev_priv,
const struct intel_crtc *intel_crtc, const struct intel_crtc *intel_crtc,
int level, int level,
struct intel_crtc_state *cstate, struct intel_crtc_state *cstate,
const struct intel_plane_state *pristate, struct intel_plane_state *pristate,
const struct intel_plane_state *sprstate, struct intel_plane_state *sprstate,
const struct intel_plane_state *curstate, struct intel_plane_state *curstate,
struct intel_wm_level *result) struct intel_wm_level *result)
{ {
uint16_t pri_latency = dev_priv->wm.pri_latency[level]; uint16_t pri_latency = dev_priv->wm.pri_latency[level];
...@@ -2342,24 +2341,28 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate) ...@@ -2342,24 +2341,28 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
struct intel_pipe_wm *pipe_wm; struct intel_pipe_wm *pipe_wm;
struct drm_device *dev = state->dev; struct drm_device *dev = state->dev;
const struct drm_i915_private *dev_priv = to_i915(dev); const struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_plane *plane; struct intel_plane *intel_plane;
const struct drm_plane_state *plane_state; struct intel_plane_state *pristate = NULL;
const struct intel_plane_state *pristate = NULL; struct intel_plane_state *sprstate = NULL;
const struct intel_plane_state *sprstate = NULL; struct intel_plane_state *curstate = NULL;
const struct intel_plane_state *curstate = NULL;
int level, max_level = ilk_wm_max_level(dev), usable_level; int level, max_level = ilk_wm_max_level(dev), usable_level;
struct ilk_wm_maximums max; struct ilk_wm_maximums max;
pipe_wm = &cstate->wm.ilk.optimal; pipe_wm = &cstate->wm.ilk.optimal;
drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, &cstate->base) { for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
const struct intel_plane_state *ps = to_intel_plane_state(plane_state); struct intel_plane_state *ps;
ps = intel_atomic_get_existing_plane_state(state,
intel_plane);
if (!ps)
continue;
if (plane->type == DRM_PLANE_TYPE_PRIMARY) if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
pristate = ps; pristate = ps;
else if (plane->type == DRM_PLANE_TYPE_OVERLAY) else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
sprstate = ps; sprstate = ps;
else if (plane->type == DRM_PLANE_TYPE_CURSOR) else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
curstate = ps; curstate = ps;
} }
...@@ -2381,9 +2384,11 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate) ...@@ -2381,9 +2384,11 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
if (pipe_wm->sprites_scaled) if (pipe_wm->sprites_scaled)
usable_level = 0; usable_level = 0;
memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate, ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
pristate, sprstate, curstate, &pipe_wm->wm[0]); pristate, sprstate, curstate, &pipe_wm->raw_wm[0]);
memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
pipe_wm->wm[0] = pipe_wm->raw_wm[0];
if (IS_HASWELL(dev) || IS_BROADWELL(dev)) if (IS_HASWELL(dev) || IS_BROADWELL(dev))
pipe_wm->linetime = hsw_compute_linetime_wm(cstate); pipe_wm->linetime = hsw_compute_linetime_wm(cstate);
...@@ -2393,8 +2398,8 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate) ...@@ -2393,8 +2398,8 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
ilk_compute_wm_reg_maximums(dev, 1, &max); ilk_compute_wm_reg_maximums(dev, 1, &max);
for (level = 1; level <= usable_level; level++) { for (level = 1; level <= max_level; level++) {
struct intel_wm_level *wm = &pipe_wm->wm[level]; struct intel_wm_level *wm = &pipe_wm->raw_wm[level];
ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate, ilk_compute_wm_level(dev_priv, intel_crtc, level, cstate,
pristate, sprstate, curstate, wm); pristate, sprstate, curstate, wm);
...@@ -2404,10 +2409,13 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate) ...@@ -2404,10 +2409,13 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
* register maximums since such watermarks are * register maximums since such watermarks are
* always invalid. * always invalid.
*/ */
if (!ilk_validate_wm_level(level, &max, wm)) { if (level > usable_level)
memset(wm, 0, sizeof(*wm)); continue;
break;
} if (ilk_validate_wm_level(level, &max, wm))
pipe_wm->wm[level] = *wm;
else
usable_level = level;
} }
return 0; return 0;
......
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