dt: amd-seattle: fix PCIe legacy interrupt routing
The AMD Seattle SOC can be configured to expose up to 3 PCIe root ports, each of which is wired to 4 dedicated SPI wired interrupts for legacy INTx support. Update the SOC DT description to reflect this. Fix a stale comment about the size of the MMIO64 resource window while at it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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