Commit acfbaa5d authored by Olof Johansson's avatar Olof Johansson

Merge tag 'qcom-arm64-for-4.21' of...

Merge tag 'qcom-arm64-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Qualcomm ARM64 Updates for v4.21

* Add QCS404 base platform and nodes
* Add QCS404 EVB boards
* Add external SD and dependencies for MSM8998-mtp
* Add default scm compatible for MSM8998
* Fix XO clk name on MSM8998
* Add prng-ee nodes for SDM845 and MSM8996
* Add ADC die temp node for pm8998
* Fix documentation on QCOM ADC sample

* tag 'qcom-arm64-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (34 commits)
  arm64: dts: qcom: msm8998: Fix compatible of scm node
  arm64: dts: qcom: msm8998: Add SDC2 control pins
  arm64: dts: qcom: msm8998-mtp: Add external SD
  arm64: dts: qcom: msm8998: Add SDCC2
  arm64: dts: qcom: msm8998: correct xo clock name
  arm64: dts: qcom: pms405: Add pon and pwrkey nodes
  arm64: dts: qcom: qcs404: Use BAM DMA for serial uart2
  arm64: dts: qcom: qcs404: Add BAM DMA node
  arm64: dts: qcom: qcs404: add prng-ee node
  arm64: dts: qcom: qcs404: Add remoteproc nodes
  arm64: dts: qcom: qcs404: Add scm firmware node
  arm64: dts: qcom: pms405: add gpios
  arm64: dts: qcom: pms405: add rtc node
  arm64: dts: qcom: qcs404: add spmi node
  arm64: dts: qcom: pms405: add spmi node
  arm64: dts: qcom: qcs404: Add sdcc1 node
  arm64: dts: qcom: qcs404: Add TLMM pinctrl node
  arm64: dts: qcom: qcs404: add smp2p nodes
  arm64: dts: qcom: qcs404: Add PMS405 RPM regulators
  arm64: dts: qcom: qcs404: Add RPM GLINK related nodes
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f491ac32 70827d9f
......@@ -140,6 +140,10 @@ VADC_GND_REF and VADC_VDD_VADC.
Example:
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <linux/irq.h>
/* ... */
/* VADC node */
pmic_vadc: vadc@3100 {
compatible = "qcom,spmi-vadc";
......@@ -151,7 +155,7 @@ Example:
io-channel-ranges;
/* Channel node */
usb_id_nopull {
adc-chan@VADC_LR_MUX10_USB_ID {
reg = <VADC_LR_MUX10_USB_ID>;
qcom,decimation = <512>;
qcom,ratiometric;
......
......@@ -8,3 +8,5 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8994-angler-rev-101.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8996-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8998-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
......@@ -234,6 +234,47 @@ map0 {
};
};
gpu-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 2>;
trips {
gpu_alert: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
gpu_crit: trip1 {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
};
camera-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 1>;
trips {
cam_alert: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cam_crit: trip1 {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
cpu_opp_table: cpu_opp_table {
......@@ -758,11 +799,13 @@ tsens_calsel: calsel@ec {
};
};
tsens: thermal-sensor@4a8000 {
tsens: thermal-sensor@4a9000 {
compatible = "qcom,msm8916-tsens";
reg = <0x4a8000 0x2000>;
reg = <0x4a9000 0x1000>, /* TM */
<0x4a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
nvmem-cell-names = "calib", "calib_sel";
#qcom,sensors = <5>;
#thermal-sensor-cells = <1>;
};
......
......@@ -370,6 +370,13 @@ rpm_msg_ram: memory@68000 {
reg = <0x68000 0x6000>;
};
rng: rng@83000 {
compatible = "qcom,prng-ee";
reg = <0x00083000 0x1000>;
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
tcsr_mutex_regs: syscon@740000 {
compatible = "syscon";
reg = <0x740000 0x20000>;
......
......@@ -241,3 +241,19 @@ vreg_bob: bob {
};
};
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
};
&sdhc2 {
status = "okay";
cd-gpios = <&tlmm 95 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vreg_l13a_2p95>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
};
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
&tlmm {
sdc2_clk_on: sdc2_clk_on {
config {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <16>; /* 16 mA */
};
};
sdc2_clk_off: sdc2_clk_off {
config {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <2>; /* 2 mA */
};
};
sdc2_cmd_on: sdc2_cmd_on {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 mA */
};
};
sdc2_cmd_off: sdc2_cmd_off {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 mA */
};
};
sdc2_data_on: sdc2_data_on {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 mA */
};
};
sdc2_data_off: sdc2_data_off {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 mA */
};
};
sdc2_cd_on: sdc2_cd_on {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 mA */
};
};
sdc2_cd_off: sdc2_cd_off {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 mA */
};
};
};
......@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8998.h>
#include <dt-bindings/gpio/gpio.h>
/ {
interrupt-parent = <&intc>;
......@@ -53,7 +54,7 @@ rmtfs {
};
clocks {
xo_board {
xo: xo {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
......@@ -239,7 +240,7 @@ core3 {
firmware {
scm {
compatible = "qcom,scm-msm8998";
compatible = "qcom,scm-msm8998", "qcom,scm";
};
};
......@@ -605,6 +606,23 @@ apcs_glb: mailbox@9820000 {
#mbox-cells = <1>;
};
sdhc2: sdhci@c0a4900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0xc0a4900 0x314>, <0xc0a4000 0x800>;
reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clock-names = "iface", "core", "xo";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&xo>;
bus-width = <4>;
status = "disabled";
};
blsp2_uart1: serial@c1b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0xc1b0000 0x1000>;
......@@ -688,3 +706,5 @@ intc: interrupt-controller@17a00000 {
};
};
};
#include "msm8998-pins.dtsi"
......@@ -75,6 +75,11 @@ pm8998_adc: adc@3100 {
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@ADC5_DIE_TEMP {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
};
};
rtc@6000 {
......
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, Linaro Limited
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/input/linux-event-codes.h>
&spmi_bus {
pms405_0: pms405@0 {
compatible = "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pms405_gpios: gpio@c000 {
compatible = "qcom,pms405-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
<0 0xc1 0 IRQ_TYPE_NONE>,
<0 0xc2 0 IRQ_TYPE_NONE>,
<0 0xc3 0 IRQ_TYPE_NONE>,
<0 0xc4 0 IRQ_TYPE_NONE>,
<0 0xc5 0 IRQ_TYPE_NONE>,
<0 0xc6 0 IRQ_TYPE_NONE>,
<0 0xc7 0 IRQ_TYPE_NONE>,
<0 0xc8 0 IRQ_TYPE_NONE>,
<0 0xc9 0 IRQ_TYPE_NONE>,
<0 0xca 0 IRQ_TYPE_NONE>,
<0 0xcb 0 IRQ_TYPE_NONE>;
};
pon@800 {
compatible = "qcom,pms405-pon";
reg = <0x0800>;
mode-bootloader = <0x2>;
mode-recovery = <0x1>;
pwrkey {
compatible = "qcom,pm8941-pwrkey";
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_POWER>;
};
};
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
};
};
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, Linaro Limited
/dts-v1/;
#include "qcs404-evb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
compatible = "qcom,qcs404-evb";
};
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, Linaro Limited
/dts-v1/;
#include "qcs404-evb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
compatible = "qcom,qcs404-evb";
};
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, Linaro Limited
#include "qcs404.dtsi"
#include "pms405.dtsi"
/ {
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-always-on;
regulator-boot-on;
};
};
&remoteproc_adsp {
status = "ok";
};
&remoteproc_cdsp {
status = "ok";
};
&remoteproc_wcss {
status = "ok";
};
&rpm_requests {
pms405-regulators {
compatible = "qcom,rpm-pms405-regulators";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-l1-l2-supply = <&vreg_s5_1p35>;
vdd-l3-l8-supply = <&vreg_s5_1p35>;
vdd-l4-supply = <&vreg_s5_1p35>;
vdd-l5-l6-supply = <&vreg_s4_1p8>;
vdd-l7-supply = <&vph_pwr>;
vdd-l9-supply = <&vreg_s5_1p35>;
vdd-l10-l11-l12-l13-supply = <&vph_pwr>;
vreg_s4_1p8: s4 {
regulator-min-microvolt = <1728000>;
regulator-max-microvolt = <1920000>;
};
vreg_s5_1p35: s5 {
regulator-min-microvolt = <>;
regulator-max-microvolt = <>;
};
vreg_l1_1p3: l1 {
regulator-min-microvolt = <1240000>;
regulator-max-microvolt = <1352000>;
};
vreg_l2_1p275: l2 {
regulator-min-microvolt = <1048000>;
regulator-max-microvolt = <1280000>;
};
vreg_l3_1p05: l3 {
regulator-min-microvolt = <976000>;
regulator-max-microvolt = <1160000>;
};
vreg_l4_1p2: l4 {
regulator-min-microvolt = <1144000>;
regulator-max-microvolt = <1256000>;
};
vreg_l5_1p8: l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_l6_1p8: l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vreg_l7_1p8: l7 {
regulator-min-microvolt = <1616000>;
regulator-max-microvolt = <3000000>;
};
vreg_l8_1p2: l8 {
regulator-min-microvolt = <1136000>;
regulator-max-microvolt = <1352000>;
};
vreg_l10_3p3: l10 {
regulator-min-microvolt = <2936000>;
regulator-max-microvolt = <3088000>;
};
vreg_l11_sdc2: l11 {
regulator-min-microvolt = <2696000>;
regulator-max-microvolt = <3304000>;
};
vreg_l12_3p3: l12 {
regulator-min-microvolt = <2968000>;
regulator-max-microvolt = <3300000>;
};
vreg_l13_3p3: l13 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
};
};
&sdcc1 {
status = "ok";
mmc-ddr-1_8v;
bus-width = <8>;
non-removable;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_on>;
pinctrl-1 = <&sdc1_off>;
};
&tlmm {
sdc1_on: sdc1-on {
clk {
pins = "sdc1_clk";
bias-disable;
drive-strength = <16>;
};
cmd {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <10>;
};
data {
pins = "sdc1_data";
bias-pull-up;
dreive-strength = <10>;
};
rclk {
pins = "sdc1_rclk";
bias-pull-down;
};
};
sdc1_off: sdc1-off {
clk {
pins = "sdc1_clk";
bias-disable;
drive-strength = <2>;
};
cmd {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <2>;
};
data {
pins = "sdc1_data";
bias-pull-up;
dreive-strength = <2>;
};
rclk {
pins = "sdc1_rclk";
bias-pull-down;
};
};
};
This diff is collapsed.
......@@ -352,6 +352,10 @@ &qupv3_id_1 {
status = "okay";
};
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
};
&uart9 {
status = "okay";
};
......
......@@ -12,6 +12,7 @@
#include <dt-bindings/phy/phy-qcom-qusb2.h>
#include <dt-bindings/reset/qcom,sdm845-aoss.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
/ {
interrupt-parent = <&intc>;
......@@ -357,6 +358,13 @@ qusb2s_hstx_trim: hstx-trim-secondary@1eb {
};
};
rng: rng@793000 {
compatible = "qcom,prng-ee";
reg = <0x00793000 0x1000>;
clocks = <&gcc GCC_PRNG_AHB_CLK>;
clock-names = "core";
};
qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x8c0000 0x6000>;
......@@ -1404,4 +1412,174 @@ frame@17d10000 {
};
};
};
thermal-zones {
cpu0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 1>;
trips {
cpu_alert0: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 2>;
trips {
cpu_alert1: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit1: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 3>;
trips {
cpu_alert2: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit2: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 4>;
trips {
cpu_alert3: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit3: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu4-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 7>;
trips {
cpu_alert4: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit4: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu5-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 8>;
trips {
cpu_alert5: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit5: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu6-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 9>;
trips {
cpu_alert6: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit6: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu7-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens0 10>;
trips {
cpu_alert7: trip0 {
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit7: trip1 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
};
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