Commit ad1cfdf5 authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner

arm64: dts: rockchip: fixes the gic400 2nd region size for rk3368

The 2nd additional region is the GIC virtual cpu interface register
base and size.

As the gic400 of rk3368 says, the cpu interface register map as below

:

-0x0000 GICC_CTRL
.
.
.
-0x00fc GICC_IIDR
-0x1000 GICC_IDR

Obviously, the region size should be greater than 0x1000.
So we should make sure to include the GICC_IDR since the kernel will access
it in some cases.

Fixes: b790c2ca ("arm64: dts: add Rockchip rk3368 core dtsi and board dts for the r88 board")
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Reviewed-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Cc: stable@vger.kernel.org

[added Fixes and stable-cc]
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 69e5a8fe
......@@ -680,7 +680,7 @@ gic: interrupt-controller@ffb71000 {
#address-cells = <0>;
reg = <0x0 0xffb71000 0x0 0x1000>,
<0x0 0xffb72000 0x0 0x1000>,
<0x0 0xffb72000 0x0 0x2000>,
<0x0 0xffb74000 0x0 0x2000>,
<0x0 0xffb76000 0x0 0x2000>;
interrupts = <GIC_PPI 9
......
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