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Commit ad5cc915 authored by Nícolas F. R. A. Prado's avatar Nícolas F. R. A. Prado Committed by Matthias Brugger
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arm64: dts: mediatek: asurada: Enable audio support 

Enable audio support for the Asurada platform. This consists of the
machine sound card, the rt1015p codec for the speakers, the rt5682 codec
for the headset, and the dmic codec for the internal microphone.

Newer revisions of spherion and hayato use the rt5682s codec for the
headset instead, so the codecs and card compatible are added through
separate dtsi files to prepare for that.

HDMI audio support is left out for now since the DisplayPort chip
required isn't enabled yet.
Tested-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Signed-off-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-5-nfraprado@collabora.comSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 7b3da218
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arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p-rt5682.dtsi 0 → 100644
View file @ ad5cc915
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2020 Google LLC
*/
#include "mt8192-asurada-audio-rt5682.dtsi"
#include "mt8192-asurada-audio-rt1015p.dtsi"
&sound {
compatible = "mediatek,mt8192_mt6359_rt1015p_rt5682";
speaker-codecs {
sound-dai = <&rt1015p>;
};
headset-codec {
sound-dai = <&rt5682 0>;
};
};
arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt1015p.dtsi 0 → 100644
View file @ ad5cc915
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 MediaTek Inc.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/mt8192-pinfunc.h>
/ {
rt1015p: audio-codec {
compatible = "realtek,rt1015p";
pinctrl-names = "default";
pinctrl-0 = <&rt1015p_pins>;
sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&pio {
rt1015p_pins: rt1015p-default-pins {
pins {
pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
output-low;
};
};
};
arch/arm64/boot/dts/mediatek/mt8192-asurada-audio-rt5682.dtsi 0 → 100644
View file @ ad5cc915
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 MediaTek Inc.
*/
&i2c1 {
rt5682: audio-codec@1a {
compatible = "realtek,rt5682i";
reg = <0x1a>;
interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
realtek,jd-src = <1>;
realtek,btndet-delay = <16>;
#sound-dai-cells = <1>;
AVDD-supply = <&mt6359_vio18_ldo_reg>;
DBVDD-supply = <&mt6359_vio18_ldo_reg>;
LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
MICVDD-supply = <&pp3300_g>;
VBAT-supply = <&pp3300_ldo_z>;
};
};
arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts
View file @ ad5cc915
......@@ -4,6 +4,7 @@
*/
/dts-v1/;
#include "mt8192-asurada.dtsi"
#include "mt8192-asurada-audio-rt1015p-rt5682.dtsi"
/ {
model = "Google Hayato rev1";
......
arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts
View file @ ad5cc915
......@@ -4,6 +4,7 @@
*/
/dts-v1/;
#include "mt8192-asurada.dtsi"
#include "mt8192-asurada-audio-rt1015p-rt5682.dtsi"
#include <dt-bindings/leds/common.h>
/ {
......
arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
View file @ ad5cc915
......@@ -33,6 +33,12 @@ backlight_lcd0: backlight-lcd0 {
default-brightness-level = <576>;
};
dmic_codec: dmic-codec {
compatible = "dmic-codec";
num-channels = <2>;
wakeup-delay-ms = <50>;
};
pp1000_dpbrdg: regulator-1v0-dpbrdg {
compatible = "regulator-fixed";
regulator-name = "pp1000_dpbrdg";
......@@ -196,6 +202,62 @@ wifi_restricted_dma_region: wifi@c0000000 {
reg = <0 0xc0000000 0 0x4000000>;
};
};
sound: sound {
mediatek,platform = <&afe>;
pinctrl-names = "aud_clk_mosi_off",
"aud_clk_mosi_on",
"aud_dat_mosi_off",
"aud_dat_mosi_on",
"aud_dat_miso_off",
"aud_dat_miso_on",
"vow_dat_miso_off",
"vow_dat_miso_on",
"vow_clk_miso_off",
"vow_clk_miso_on",
"aud_nle_mosi_off",
"aud_nle_mosi_on",
"aud_dat_miso2_off",
"aud_dat_miso2_on",
"aud_gpio_i2s3_off",
"aud_gpio_i2s3_on",
"aud_gpio_i2s8_off",
"aud_gpio_i2s8_on",
"aud_gpio_i2s9_off",
"aud_gpio_i2s9_on",
"aud_dat_mosi_ch34_off",
"aud_dat_mosi_ch34_on",
"aud_dat_miso_ch34_off",
"aud_dat_miso_ch34_on",
"aud_gpio_tdm_off",
"aud_gpio_tdm_on";
pinctrl-0 = <&aud_clk_mosi_off_pins>;
pinctrl-1 = <&aud_clk_mosi_on_pins>;
pinctrl-2 = <&aud_dat_mosi_off_pins>;
pinctrl-3 = <&aud_dat_mosi_on_pins>;
pinctrl-4 = <&aud_dat_miso_off_pins>;
pinctrl-5 = <&aud_dat_miso_on_pins>;
pinctrl-6 = <&vow_dat_miso_off_pins>;
pinctrl-7 = <&vow_dat_miso_on_pins>;
pinctrl-8 = <&vow_clk_miso_off_pins>;
pinctrl-9 = <&vow_clk_miso_on_pins>;
pinctrl-10 = <&aud_nle_mosi_off_pins>;
pinctrl-11 = <&aud_nle_mosi_on_pins>;
pinctrl-12 = <&aud_dat_miso2_off_pins>;
pinctrl-13 = <&aud_dat_miso2_on_pins>;
pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
pinctrl-24 = <&aud_gpio_tdm_off_pins>;
pinctrl-25 = <&aud_gpio_tdm_on_pins>;
};
};
&dsi0 {
......@@ -660,6 +722,165 @@ pins-in {
};
};
aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
pins-mosi-off {
pinmux = <PINMUX_GPIO214__FUNC_GPIO214>,
<PINMUX_GPIO215__FUNC_GPIO215>;
};
};
aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
pins-mosi-on {
pinmux = <PINMUX_GPIO214__FUNC_AUD_CLK_MOSI>,
<PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI>;
drive-strength = <10>;
};
};
aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
pins-miso-off {
pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
};
};
aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
pins-miso-on {
pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
};
};
aud_dat_miso_off_pins: aud-dat-miso-off-pins {
pins-miso-off {
pinmux = <PINMUX_GPIO218__FUNC_GPIO218>,
<PINMUX_GPIO219__FUNC_GPIO219>;
};
};
aud_dat_miso_on_pins: aud-dat-miso-on-pins {
pins-miso-on {
pinmux = <PINMUX_GPIO218__FUNC_AUD_DAT_MISO0>,
<PINMUX_GPIO219__FUNC_AUD_DAT_MISO1>;
drive-strength = <10>;
};
};
aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
pins-miso-off {
pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
};
};
aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
pins-miso-on {
pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
};
};
aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
pins-mosi-off {
pinmux = <PINMUX_GPIO196__FUNC_GPIO196>;
};
};
aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
pins-mosi-on {
pinmux = <PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2>;
};
};
aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
pins-mosi-off {
pinmux = <PINMUX_GPIO216__FUNC_GPIO216>,
<PINMUX_GPIO217__FUNC_GPIO217>;
};
};
aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
pins-mosi-on {
pinmux = <PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0>,
<PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1>;
drive-strength = <10>;
};
};
aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
pins-i2s3-off {
pinmux = <PINMUX_GPIO32__FUNC_GPIO32>,
<PINMUX_GPIO33__FUNC_GPIO33>,
<PINMUX_GPIO35__FUNC_GPIO35>;
};
};
aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
pins-i2s3-on {
pinmux = <PINMUX_GPIO32__FUNC_I2S3_BCK>,
<PINMUX_GPIO33__FUNC_I2S3_LRCK>,
<PINMUX_GPIO35__FUNC_I2S3_DO>;
};
};
aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
pins-i2s8-off {
pinmux = <PINMUX_GPIO10__FUNC_GPIO10>,
<PINMUX_GPIO11__FUNC_GPIO11>,
<PINMUX_GPIO12__FUNC_GPIO12>,
<PINMUX_GPIO13__FUNC_GPIO13>;
};
};
aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
pins-i2s8-on {
pinmux = <PINMUX_GPIO10__FUNC_I2S8_MCK>,
<PINMUX_GPIO11__FUNC_I2S8_BCK>,
<PINMUX_GPIO12__FUNC_I2S8_LRCK>,
<PINMUX_GPIO13__FUNC_I2S8_DI>;
};
};
aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
pins-i2s9-off {
pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
};
};
aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
pins-i2s9-on {
pinmux = <PINMUX_GPIO29__FUNC_I2S9_DO>;
};
};
aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
pins-tdm-off {
pinmux = <PINMUX_GPIO0__FUNC_GPIO0>,
<PINMUX_GPIO1__FUNC_GPIO1>,
<PINMUX_GPIO2__FUNC_GPIO2>,
<PINMUX_GPIO3__FUNC_GPIO3>;
};
};
aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
pins-tdm-on {
pinmux = <PINMUX_GPIO0__FUNC_TDM_LRCK>,
<PINMUX_GPIO1__FUNC_TDM_BCK>,
<PINMUX_GPIO2__FUNC_TDM_MCK>,
<PINMUX_GPIO3__FUNC_TDM_DATA0>;
};
};
aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
pins-nle-mosi-off {
pinmux = <PINMUX_GPIO197__FUNC_GPIO197>,
<PINMUX_GPIO198__FUNC_GPIO198>;
};
};
aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
pins-nle-mosi-on {
pinmux = <PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1>,
<PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0>;
};
};
cr50_int: cr50-irq-default-pins {
pins-gsc-ap-int-odl {
pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
......@@ -987,6 +1208,30 @@ pins-report-sw {
output-low;
};
};
vow_clk_miso_off_pins: vow-clk-miso-off-pins {
pins-miso-off {
pinmux = <PINMUX_GPIO219__FUNC_GPIO219>;
};
};
vow_clk_miso_on_pins: vow-clk-miso-on-pins {
pins-miso-on {
pinmux = <PINMUX_GPIO219__FUNC_VOW_CLK_MISO>;
};
};
vow_dat_miso_off_pins: vow-dat-miso-off-pins {
pins-miso-off {
pinmux = <PINMUX_GPIO218__FUNC_GPIO218>;
};
};
vow_dat_miso_on_pins: vow-dat-miso-on-pins {
pins-miso-on {
pinmux = <PINMUX_GPIO218__FUNC_VOW_DAT_MISO>;
};
};
};
&pmic {
......
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