Commit add9f9a8 authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: cleanup VCN IB generation

Start to use amdgpu_bo_create_reserved v2.

v2:
Fix missing pointer init to NULL.
Remove extra new lines.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Tested-and-Reviewed-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4ab91cfb
...@@ -270,34 +270,17 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring) ...@@ -270,34 +270,17 @@ int amdgpu_vcn_dec_ring_test_ring(struct amdgpu_ring *ring)
return r; return r;
} }
static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
bool direct, struct dma_fence **fence) struct amdgpu_bo *bo, bool direct,
struct dma_fence **fence)
{ {
struct ttm_operation_ctx ctx = { true, false }; struct amdgpu_device *adev = ring->adev;
struct ttm_validate_buffer tv; struct dma_fence *f = NULL;
struct ww_acquire_ctx ticket;
struct list_head head;
struct amdgpu_job *job; struct amdgpu_job *job;
struct amdgpu_ib *ib; struct amdgpu_ib *ib;
struct dma_fence *f = NULL;
struct amdgpu_device *adev = ring->adev;
uint64_t addr; uint64_t addr;
int i, r; int i, r;
memset(&tv, 0, sizeof(tv));
tv.bo = &bo->tbo;
INIT_LIST_HEAD(&head);
list_add(&tv.head, &head);
r = ttm_eu_reserve_buffers(&ticket, &head, true, NULL);
if (r)
return r;
r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
if (r)
goto err;
r = amdgpu_job_alloc_with_ib(adev, 64, &job); r = amdgpu_job_alloc_with_ib(adev, 64, &job);
if (r) if (r)
goto err; goto err;
...@@ -330,11 +313,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b ...@@ -330,11 +313,12 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
goto err_free; goto err_free;
} }
ttm_eu_fence_buffer_objects(&ticket, &head, f); amdgpu_bo_fence(bo, f, false);
amdgpu_bo_unreserve(bo);
amdgpu_bo_unref(&bo);
if (fence) if (fence)
*fence = dma_fence_get(f); *fence = dma_fence_get(f);
amdgpu_bo_unref(&bo);
dma_fence_put(f); dma_fence_put(f);
return 0; return 0;
...@@ -343,7 +327,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b ...@@ -343,7 +327,8 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *b
amdgpu_job_free(job); amdgpu_job_free(job);
err: err:
ttm_eu_backoff_reservation(&ticket, &head); amdgpu_bo_unreserve(bo);
amdgpu_bo_unref(&bo);
return r; return r;
} }
...@@ -351,31 +336,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand ...@@ -351,31 +336,16 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
struct dma_fence **fence) struct dma_fence **fence)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
struct amdgpu_bo *bo; struct amdgpu_bo *bo = NULL;
uint32_t *msg; uint32_t *msg;
int r, i; int r, i;
r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true, r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM, AMDGPU_GEM_DOMAIN_VRAM,
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | &bo, NULL, (void **)&msg);
AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
NULL, NULL, &bo);
if (r) if (r)
return r; return r;
r = amdgpu_bo_reserve(bo, false);
if (r) {
amdgpu_bo_unref(&bo);
return r;
}
r = amdgpu_bo_kmap(bo, (void **)&msg);
if (r) {
amdgpu_bo_unreserve(bo);
amdgpu_bo_unref(&bo);
return r;
}
msg[0] = cpu_to_le32(0x00000028); msg[0] = cpu_to_le32(0x00000028);
msg[1] = cpu_to_le32(0x00000038); msg[1] = cpu_to_le32(0x00000038);
msg[2] = cpu_to_le32(0x00000001); msg[2] = cpu_to_le32(0x00000001);
...@@ -393,9 +363,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand ...@@ -393,9 +363,6 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
for (i = 14; i < 1024; ++i) for (i = 14; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0); msg[i] = cpu_to_le32(0x0);
amdgpu_bo_kunmap(bo);
amdgpu_bo_unreserve(bo);
return amdgpu_vcn_dec_send_msg(ring, bo, true, fence); return amdgpu_vcn_dec_send_msg(ring, bo, true, fence);
} }
...@@ -403,31 +370,16 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han ...@@ -403,31 +370,16 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
bool direct, struct dma_fence **fence) bool direct, struct dma_fence **fence)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
struct amdgpu_bo *bo; struct amdgpu_bo *bo = NULL;
uint32_t *msg; uint32_t *msg;
int r, i; int r, i;
r = amdgpu_bo_create(adev, 1024, PAGE_SIZE, true, r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM, AMDGPU_GEM_DOMAIN_VRAM,
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | &bo, NULL, (void **)&msg);
AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
NULL, NULL, &bo);
if (r) if (r)
return r; return r;
r = amdgpu_bo_reserve(bo, false);
if (r) {
amdgpu_bo_unref(&bo);
return r;
}
r = amdgpu_bo_kmap(bo, (void **)&msg);
if (r) {
amdgpu_bo_unreserve(bo);
amdgpu_bo_unref(&bo);
return r;
}
msg[0] = cpu_to_le32(0x00000028); msg[0] = cpu_to_le32(0x00000028);
msg[1] = cpu_to_le32(0x00000018); msg[1] = cpu_to_le32(0x00000018);
msg[2] = cpu_to_le32(0x00000000); msg[2] = cpu_to_le32(0x00000000);
...@@ -437,9 +389,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han ...@@ -437,9 +389,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
for (i = 6; i < 1024; ++i) for (i = 6; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0); msg[i] = cpu_to_le32(0x0);
amdgpu_bo_kunmap(bo);
amdgpu_bo_unreserve(bo);
return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence); return amdgpu_vcn_dec_send_msg(ring, bo, direct, fence);
} }
......
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