Commit addd0278 authored by Joël Esponde's avatar Joël Esponde Committed by Sasha Levin

mtd: spi-nor: fix spansion quad enable

[ Upstream commit 807c1625 ]

With the S25FL127S nor flash part, each writing to the configuration
register takes hundreds of ms. During that  time, no more accesses to
the flash should be done (even reads).

This commit adds a wait loop after the register writing until the flash
finishes its work.

This issue could make rootfs mounting fail when the latter was done too
much closely to this quad enable bit setting step. And in this case, a
driver as UBIFS may try to recover the filesystem and may broke it
completely.
Signed-off-by: default avatarJoël Esponde <joel.esponde@honeywell.com>
Signed-off-by: default avatarCyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
parent a4d31e12
...@@ -900,6 +900,13 @@ static int spansion_quad_enable(struct spi_nor *nor) ...@@ -900,6 +900,13 @@ static int spansion_quad_enable(struct spi_nor *nor)
return -EINVAL; return -EINVAL;
} }
ret = spi_nor_wait_till_ready(nor);
if (ret) {
dev_err(nor->dev,
"timeout while writing configuration register\n");
return ret;
}
/* read back and check it */ /* read back and check it */
ret = read_cr(nor); ret = read_cr(nor);
if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) { if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) {
......
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