Commit aeb871d6 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo

dt-bindings: pinctrl: imx: Add fsl,scu-iomux yaml file

In order to replace the fsl,scu txt file from bindings/arm/freescale,
we need to split it between the right subsystems. This patch documents
separately the 'iomux/pinctrl' child node of the SCU main node.
Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarViorel Suman <viorel.suman@nxp.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9056aa04
......@@ -79,33 +79,7 @@ Required properties:
See detailed Resource ID list from:
include/dt-bindings/firmware/imx/rsrc.h
Pinctrl bindings based on SCU Message Protocol
------------------------------------------------------------
This binding uses the i.MX common pinctrl binding[3].
Required properties:
- compatible: Should be one of:
"fsl,imx8qm-iomuxc",
"fsl,imx8qxp-iomuxc",
"fsl,imx8dxl-iomuxc".
Required properties for Pinctrl sub nodes:
- fsl,pins: Each entry consists of 3 integers which represents
the mux and config setting for one pin. The first 2
integers <pin_id mux_mode> are specified using a
PIN_FUNC_ID macro, which can be found in
<dt-bindings/pinctrl/pads-imx8qm.h>,
<dt-bindings/pinctrl/pads-imx8qxp.h>,
<dt-bindings/pinctrl/pads-imx8dxl.h>.
The last integer CONFIG is the pad setting value like
pull-up on this pin.
Please refer to i.MX8QXP Reference Manual for detailed
CONFIG settings.
[2] Documentation/devicetree/bindings/power/power-domain.yaml
[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
RTC bindings based on SCU Message Protocol
------------------------------------------------------------
......@@ -184,18 +158,6 @@ firmware {
&lsio_mu1 1 3
&lsio_mu1 3 3>;
iomuxc {
compatible = "fsl,imx8qxp-iomuxc";
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
SC_P_UART0_RX_ADMA_UART0_RX 0x06000020
SC_P_UART0_TX_ADMA_UART0_TX 0x06000020
>;
};
...
};
ocotp: imx8qx-ocotp {
compatible = "fsl,imx8qxp-scu-ocotp";
#address-cells = <1>;
......@@ -234,7 +196,5 @@ firmware {
serial@5a060000 {
...
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart0>;
power-domains = <&pd IMX_SC_R_UART_0>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
This binding uses the i.MX common pinctrl binding.
(Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
allOf:
- $ref: pinctrl.yaml#
properties:
compatible:
enum:
- fsl,imx8qm-iomuxc
- fsl,imx8qxp-iomuxc
- fsl,imx8dxl-iomuxc
patternProperties:
'grp$':
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
properties:
fsl,pins:
description:
each entry consists of 3 integers and represents the pin ID, the mux value
and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
specified using a PIN_FUNC_ID macro, which can be found in
<include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer is
the pad setting value like pull-up on this pin. Please refer to the
appropriate i.MX8 Reference Manual for detailed pad CONFIG settings.
$ref: /schemas/types.yaml#/definitions/uint32-matrix
items:
items:
- description: |
"pin_id" indicates the pin ID
- description: |
"mux_val" indicates the mux value to be applied.
- description: |
"pad_setting" indicates the pad configuration value to be applied.
required:
- fsl,pins
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
pinctrl {
compatible = "fsl,imx8qxp-iomuxc";
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
111 0 0x06000020
112 0 0x06000020
>;
};
};
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