Commit af1f1b81 authored by Mahesh Kumar's avatar Mahesh Kumar Committed by Paulo Zanoni

drm/i915/icl: fix gmbus gpio pin mapping

ICP has GPIO pin 1/2 mapped to combo-phy ports & GPIO pins 9/10/11/12
mapped to tc ports[1-4].
This patch defines GPIOCTL registers for GPIO pins 9-12 & uses them in GPIO
pin mapping table.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180612002512.29783-1-paulo.r.zanoni@intel.com
parent dccc7228
...@@ -2988,6 +2988,10 @@ enum i915_power_well_id { ...@@ -2988,6 +2988,10 @@ enum i915_power_well_id {
#define GPIOF _MMIO(0x5024) #define GPIOF _MMIO(0x5024)
#define GPIOG _MMIO(0x5028) #define GPIOG _MMIO(0x5028)
#define GPIOH _MMIO(0x502c) #define GPIOH _MMIO(0x502c)
#define GPIOJ _MMIO(0x5034)
#define GPIOK _MMIO(0x5038)
#define GPIOL _MMIO(0x503C)
#define GPIOM _MMIO(0x5040)
# define GPIO_CLOCK_DIR_MASK (1 << 0) # define GPIO_CLOCK_DIR_MASK (1 << 0)
# define GPIO_CLOCK_DIR_IN (0 << 1) # define GPIO_CLOCK_DIR_IN (0 << 1)
# define GPIO_CLOCK_DIR_OUT (1 << 1) # define GPIO_CLOCK_DIR_OUT (1 << 1)
......
...@@ -2234,7 +2234,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, ...@@ -2234,7 +2234,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
ddc_pin = bxt_port_to_ddc_pin(dev_priv, port); ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
else if (HAS_PCH_CNP(dev_priv)) else if (HAS_PCH_CNP(dev_priv))
ddc_pin = cnp_port_to_ddc_pin(dev_priv, port); ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
else if (IS_ICELAKE(dev_priv)) else if (HAS_PCH_ICP(dev_priv))
ddc_pin = icl_port_to_ddc_pin(dev_priv, port); ddc_pin = icl_port_to_ddc_pin(dev_priv, port);
else else
ddc_pin = g4x_port_to_ddc_pin(dev_priv, port); ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
......
...@@ -77,12 +77,12 @@ static const struct gmbus_pin gmbus_pins_cnp[] = { ...@@ -77,12 +77,12 @@ static const struct gmbus_pin gmbus_pins_cnp[] = {
}; };
static const struct gmbus_pin gmbus_pins_icp[] = { static const struct gmbus_pin gmbus_pins_icp[] = {
[GMBUS_PIN_1_BXT] = { "dpa", GPIOA }, [GMBUS_PIN_1_BXT] = { "dpa", GPIOB },
[GMBUS_PIN_2_BXT] = { "dpb", GPIOB }, [GMBUS_PIN_2_BXT] = { "dpb", GPIOC },
[GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOC }, [GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ },
[GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOD }, [GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOK },
[GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOE }, [GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOL },
[GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOF }, [GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOM },
}; };
/* pin is expected to be valid */ /* pin is expected to be valid */
......
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