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Commit af911564 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-arm-dt-for-v5.12-tag2' of... 

Merge tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.12 (take two)

  - Increase support (SPI, I2C, Ethernet, Serial, MMC) for the R-Car V3U
    SoC on the Renesas Falcon board,
  - Disable SD functions for plain eMMC,
  - A minor fix.

* tag 'renesas-arm-dt-for-v5.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: beacon: Fix EEPROM compatible value
  arm64: dts: renesas: falcon: Enable MMC
  arm64: dts: renesas: r8a779a0: Add MMC node
  arm64: dts: renesas: r8a779a0: Add HSCIF support
  arm64: dts: renesas: falcon: Complete SCIF0 nodes
  arm64: dts: renesas: r8a779a0: Add & update SCIF nodes
  arm64: dts: renesas: falcon: Add Ethernet-AVB0 support
  arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
  arm64: dts: renesas: falcon: Add I2C0,1,6 support
  arm64: dts: renesas: r8a779a0: Add I2C nodes
  arm64: dts: renesas: Disable SD functions for plain eMMC
  arm64: dts: renesas: r8a779a0: Add MSIOF device nodes

Link: https://lore.kernel.org/r/20210129090815.2552425-2-geert+renesas@glider.beSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0b9c5cdd 74477936
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arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
View file @ af911564
......@@ -144,7 +144,7 @@ pca9654_lte: gpio@21 {
};
eeprom@50 {
compatible = "microchip,at24c64", "atmel,24c64";
compatible = "microchip,24c64", "atmel,24c64";
pagesize = <32>;
read-only; /* Manufacturing EEPROM programmed at factory */
reg = <0x50>;
......@@ -312,6 +312,8 @@ &sdhi3 {
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
......
arch/arm64/boot/dts/renesas/hihope-common.dtsi
View file @ af911564
......@@ -328,6 +328,8 @@ &sdhi3 {
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
......
arch/arm64/boot/dts/renesas/r8a77980-condor.dts
View file @ af911564
......@@ -217,6 +217,8 @@ &mmc0 {
vqmmc-supply = <&vddq_vin01>;
mmc-hs200-1_8v;
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
status = "okay";
};
......
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
View file @ af911564
......@@ -712,6 +712,8 @@ &sdhi3 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
full-pwr-cycle-in-suspend;
status = "okay";
......
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
View file @ af911564
......@@ -496,6 +496,8 @@ &sdhi2 {
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
no-sd;
no-sdio;
non-removable;
status = "okay";
};
......
arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
View file @ af911564
......@@ -5,6 +5,7 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include "r8a779a0.dtsi"
/ {
......@@ -31,6 +32,40 @@ memory@700000000 {
device_type = "memory";
reg = <0x7 0x00000000 0x0 0x80000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&avb0 {
pinctrl-0 = <&avb0_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
rxc-skew-ps = <1500>;
reg = <0>;
interrupt-parent = <&gpio4>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
};
};
&extal_clk {
......@@ -41,6 +76,109 @@ &extalr_clk {
clock-frequency = <32768>;
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
};
&i2c6 {
pinctrl-0 = <&i2c6_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
};
&mmc0 {
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
full-pwr-cycle-in-suspend;
status = "okay";
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
avb0_pins: avb0 {
mux {
groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
function = "avb0";
};
pins_mdio {
groups = "avb0_mdio";
drive-strength = <21>;
};
pins_mii {
groups = "avb0_rgmii";
drive-strength = <21>;
};
};
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
};
i2c1_pins: i2c1 {
groups = "i2c1";
function = "i2c1";
};
i2c6_pins: i2c6 {
groups = "i2c6";
function = "i2c6";
};
mmc_pins: mmc {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
power-source = <1800>;
};
scif0_pins: scif0 {
groups = "scif0_data", "scif0_ctrl";
function = "scif0";
};
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&scif_clk {
clock-frequency = <24000000>;
};
arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts
View file @ af911564
......@@ -13,6 +13,7 @@ / {
compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
aliases {
ethernet0 = &avb0;
serial0 = &scif0;
};
......
arch/arm64/boot/dts/renesas/r8a779a0.dtsi
View file @ af911564
......@@ -14,6 +14,16 @@ / {
#address-cells = <2>;
#size-cells = <2>;
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -250,6 +260,464 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>;
};
i2c0: i2c@e6500000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 518>;
dmas = <&dmac1 0x91>, <&dmac1 0x90>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e6508000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 519>;
dmas = <&dmac1 0x93>, <&dmac1 0x92>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e6510000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 520>;
dmas = <&dmac1 0x95>, <&dmac1 0x94>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e66d0000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 521>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 521>;
dmas = <&dmac1 0x97>, <&dmac1 0x96>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@e66d8000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 522>;
dmas = <&dmac1 0x99>, <&dmac1 0x98>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: i2c@e66e0000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 523>;
dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c6: i2c@e66e8000 {
compatible = "renesas,i2c-r8a779a0",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 524>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 524>;
dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
dma-names = "tx", "rx";
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
hscif0: serial@e6540000 {
compatible = "renesas,hscif-r8a779a0",
"renesas,rcar-gen3-hscif", "renesas,hscif";
reg = <0 0xe6540000 0 0x60>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 514>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 514>;
status = "disabled";
};
hscif1: serial@e6550000 {
compatible = "renesas,hscif-r8a779a0",
"renesas,rcar-gen3-hscif", "renesas,hscif";
reg = <0 0xe6550000 0 0x60>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 515>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 515>;
status = "disabled";
};
hscif2: serial@e6560000 {
compatible = "renesas,hscif-r8a779a0",
"renesas,rcar-gen3-hscif", "renesas,hscif";
reg = <0 0xe6560000 0 0x60>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 516>;
status = "disabled";
};
hscif3: serial@e66a0000 {
compatible = "renesas,hscif-r8a779a0",
"renesas,rcar-gen3-hscif", "renesas,hscif";
reg = <0 0xe66a0000 0 0x60>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x37>, <&dmac1 0x36>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 517>;
status = "disabled";
};
avb0: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6800000 0 0x800>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 211>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 211>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb1: ethernet@e6810000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6810000 0 0x800>;
interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 212>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 212>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb2: ethernet@e6820000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6820000 0 0x1000>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 213>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 213>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb3: ethernet@e6830000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6830000 0 0x1000>;
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 214>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 214>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb4: ethernet@e6840000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6840000 0 0x1000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 215>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 215>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb5: ethernet@e6850000 {
compatible = "renesas,etheravb-r8a779a0",
"renesas,etheravb-rcar-gen3";
reg = <0 0xe6850000 0 0x1000>;
interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14", "ch15",
"ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 216>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 216>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a779a0",
"renesas,rcar-gen3-scif", "renesas,scif";
......@@ -259,11 +727,151 @@ scif0: serial@e6e60000 {
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 702>;
status = "disabled";
};
scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a779a0",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
scif3: serial@e6c50000 {
compatible = "renesas,scif-r8a779a0",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x57>, <&dmac1 0x56>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
};
scif4: serial@e6c40000 {
compatible = "renesas,scif-r8a779a0",
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 705>,
<&cpg CPG_CORE R8A779A0_CLK_S1D2>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x59>, <&dmac1 0x58>;
dma-names = "tx", "rx";
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 705>;
status = "disabled";
};
msiof0: spi@e6e90000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6e90000 0 0x0064>;
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 618>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 618>;
dmas = <&dmac1 0x41>, <&dmac1 0x40>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof1: spi@e6ea0000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6ea0000 0 0x0064>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 619>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 619>;
dmas = <&dmac1 0x43>, <&dmac1 0x42>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof2: spi@e6c00000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6c00000 0 0x0064>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 620>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 620>;
dmas = <&dmac1 0x45>, <&dmac1 0x44>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof3: spi@e6c10000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6c10000 0 0x0064>;
interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 621>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 621>;
dmas = <&dmac1 0x47>, <&dmac1 0x46>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof4: spi@e6c20000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6c20000 0 0x0064>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 622>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 622>;
dmas = <&dmac1 0x49>, <&dmac1 0x48>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof5: spi@e6c28000 {
compatible = "renesas,msiof-r8a779a0",
"renesas,rcar-gen3-msiof";
reg = <0 0xe6c28000 0 0x0064>;
interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 623>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 623>;
dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
dmac1: dma-controller@e7350000 {
compatible = "renesas,dmac-r8a779a0";
reg = <0 0xe7350000 0 0x1000>,
......@@ -322,6 +930,18 @@ dmac2: dma-controller@e7351000 {
dma-channels = <8>;
};
mmc0: mmc@ee140000 {
compatible = "renesas,sdhi-r8a779a0",
"renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 706>;
power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
resets = <&cpg 706>;
max-frequency = <200000000>;
status = "disabled";
};
gic: interrupt-controller@f1000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
......
arch/arm64/boot/dts/renesas/salvator-common.dtsi
View file @ af911564
......@@ -831,6 +831,8 @@ &sdhi2 {
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
no-sd;
no-sdio;
non-removable;
fixed-emmc-driver-type = <1>;
full-pwr-cycle-in-suspend;
......
arch/arm64/boot/dts/renesas/ulcb.dtsi
View file @ af911564
......@@ -468,6 +468,8 @@ &sdhi2 {
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
no-sd;
no-sdio;
non-removable;
full-pwr-cycle-in-suspend;
status = "okay";
......
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