Commit afea3278 authored by Olof Johansson's avatar Olof Johansson

pasemi_mac: Move RX/TX section enablement to dma_lib

Also stop both rx and tx sections before changing the configuration of
the dma device during init.
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
Acked-by: default avatarJeff Garzik <jgarzik@pobox.com>
parent 6a2d322e
......@@ -17,6 +17,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
......@@ -410,6 +411,7 @@ int pasemi_dma_init(void)
struct resource res;
struct device_node *dn;
int i, intf, err = 0;
unsigned long timeout;
u32 tmp;
if (!machine_is(pasemi))
......@@ -478,6 +480,34 @@ int pasemi_dma_init(void)
for (i = 0; i < MAX_RXCH; i++)
__set_bit(i, rxch_free);
timeout = jiffies + HZ;
pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, 0);
while (pasemi_read_dma_reg(PAS_DMA_COM_RXSTA) & 1) {
if (time_after(jiffies, timeout)) {
pr_warning("Warning: Could not disable RX section\n");
break;
}
}
timeout = jiffies + HZ;
pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, 0);
while (pasemi_read_dma_reg(PAS_DMA_COM_TXSTA) & 1) {
if (time_after(jiffies, timeout)) {
pr_warning("Warning: Could not disable TX section\n");
break;
}
}
/* setup resource allocations for the different DMA sections */
tmp = pasemi_read_dma_reg(PAS_DMA_COM_CFG);
pasemi_write_dma_reg(PAS_DMA_COM_CFG, tmp | 0x18000000);
/* enable tx section */
pasemi_write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
/* enable rx section */
pasemi_write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
printk(KERN_INFO "PA Semi PWRficient DMA library initialized "
"(%d tx, %d rx channels)\n", num_txch, num_rxch);
......
......@@ -1043,12 +1043,6 @@ static int pasemi_mac_open(struct net_device *dev)
unsigned int flags;
int ret;
/* enable rx section */
write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
/* enable tx section */
write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
......
/*
* Copyright (C) 2006 PA Semi, Inc
* Copyright (C) 2006-2008 PA Semi, Inc
*
* Hardware register layout and descriptor formats for the on-board
* DMA engine on PA Semi PWRficient. Used by ethernet, function and security
......@@ -40,6 +40,11 @@ enum {
PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */
PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */
PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */
PAS_DMA_COM_CFG = 0x114, /* Common config reg */
PAS_DMA_TXF_SFLG0 = 0x140, /* Set flags */
PAS_DMA_TXF_SFLG1 = 0x144, /* Set flags */
PAS_DMA_TXF_CFLG0 = 0x148, /* Set flags */
PAS_DMA_TXF_CFLG1 = 0x14c, /* Set flags */
};
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment