Commit b0403b91 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: shmobile: lager dts: Add MSIOF nodes

Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 7713d3ab
...@@ -159,6 +159,12 @@ qspi_pins: spi0 { ...@@ -159,6 +159,12 @@ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi"; renesas,function = "qspi";
}; };
msiof1_pins: spi2 {
renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
"msiof1_tx";
renesas,function = "msiof1";
};
}; };
&ether { &ether {
...@@ -221,6 +227,22 @@ partition@440000 { ...@@ -221,6 +227,22 @@ partition@440000 {
}; };
}; };
&msiof1 {
pinctrl-0 = <&msiof1_pins>;
pinctrl-names = "default";
status = "okay";
pmic: pmic@0 {
compatible = "renesas,r2a11302ft";
reg = <0>;
spi-max-frequency = <6000000>;
spi-cpol;
spi-cpha;
};
};
&sdhi0 { &sdhi0 {
pinctrl-0 = <&sdhi0_pins>; pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
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