Commit b04c5bd6 authored by Borun Fu's avatar Borun Fu Committed by Daniel Vetter

drm/i915: Power gating display wells during i915_pm_suspend

On VLV, after i915_pm_suspend display power wells are staying
power ungated. So, after initiating mem sleep "echo mem > /sys/power/state"
Display is staing D0 State. There might be better way/place to power gate
these wells. Also, we need to make sure that if wells are power gated due to
DPMS OFF sequence, they need not be turned off by i915_pm_suspend again.

v2: Extracted helper for intel_crtc_disable and power gating CRTC power wells.
[Daniel]

Cc: Imre Deak <imre.deak@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Change-Id: I34c80da66aa24c423a5576c68aa1f3a8d0f43848
Signed-off-by: default avatarBorun Fu <borun.fu@intel.com>
Signed-off-by: default avatarSagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b55dd647
...@@ -525,12 +525,11 @@ static int i915_drm_freeze(struct drm_device *dev) ...@@ -525,12 +525,11 @@ static int i915_drm_freeze(struct drm_device *dev)
/* /*
* Disable CRTCs directly since we want to preserve sw state * Disable CRTCs directly since we want to preserve sw state
* for _thaw. * for _thaw. Also, power gate the CRTC power wells.
*/ */
drm_modeset_lock_all(dev); drm_modeset_lock_all(dev);
for_each_crtc(dev, crtc) { for_each_crtc(dev, crtc)
dev_priv->display.crtc_disable(crtc); intel_crtc_control(crtc, false);
}
drm_modeset_unlock_all(dev); drm_modeset_unlock_all(dev);
intel_modeset_suspend_hw(dev); intel_modeset_suspend_hw(dev);
......
...@@ -179,6 +179,10 @@ enum hpd_pin { ...@@ -179,6 +179,10 @@ enum hpd_pin {
list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \ list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
if ((intel_connector)->base.encoder == (__encoder)) if ((intel_connector)->base.encoder == (__encoder))
#define for_each_power_domain(domain, mask) \
for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \
if ((1 << (domain)) & (mask))
struct drm_i915_private; struct drm_i915_private;
struct i915_mmu_object; struct i915_mmu_object;
......
...@@ -4300,10 +4300,6 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc) ...@@ -4300,10 +4300,6 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
I915_WRITE(BCLRPAT(crtc->pipe), 0); I915_WRITE(BCLRPAT(crtc->pipe), 0);
} }
#define for_each_power_domain(domain, mask) \
for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \
if ((1 << (domain)) & (mask))
enum intel_display_power_domain enum intel_display_power_domain
intel_display_port_power_domain(struct intel_encoder *intel_encoder) intel_display_port_power_domain(struct intel_encoder *intel_encoder)
{ {
...@@ -4872,21 +4868,14 @@ static void intel_crtc_update_sarea(struct drm_crtc *crtc, ...@@ -4872,21 +4868,14 @@ static void intel_crtc_update_sarea(struct drm_crtc *crtc,
} }
} }
/** /* Master function to enable/disable CRTC and corresponding power wells */
* Sets the power management mode of the pipe and plane. void intel_crtc_control(struct drm_crtc *crtc, bool enable)
*/
void intel_crtc_update_dpms(struct drm_crtc *crtc)
{ {
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_encoder *intel_encoder;
enum intel_display_power_domain domain; enum intel_display_power_domain domain;
unsigned long domains; unsigned long domains;
bool enable = false;
for_each_encoder_on_crtc(dev, crtc, intel_encoder)
enable |= intel_encoder->connectors_active;
if (enable) { if (enable) {
if (!intel_crtc->active) { if (!intel_crtc->active) {
...@@ -4907,6 +4896,21 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc) ...@@ -4907,6 +4896,21 @@ void intel_crtc_update_dpms(struct drm_crtc *crtc)
intel_crtc->enabled_power_domains = 0; intel_crtc->enabled_power_domains = 0;
} }
} }
}
/**
* Sets the power management mode of the pipe and plane.
*/
void intel_crtc_update_dpms(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct intel_encoder *intel_encoder;
bool enable = false;
for_each_encoder_on_crtc(dev, crtc, intel_encoder)
enable |= intel_encoder->connectors_active;
intel_crtc_control(crtc, enable);
intel_crtc_update_sarea(crtc, enable); intel_crtc_update_sarea(crtc, enable);
} }
......
...@@ -753,6 +753,7 @@ void intel_frontbuffer_flip(struct drm_device *dev, ...@@ -753,6 +753,7 @@ void intel_frontbuffer_flip(struct drm_device *dev,
void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire); void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire);
void intel_mark_idle(struct drm_device *dev); void intel_mark_idle(struct drm_device *dev);
void intel_crtc_restore_mode(struct drm_crtc *crtc); void intel_crtc_restore_mode(struct drm_crtc *crtc);
void intel_crtc_control(struct drm_crtc *crtc, bool enable);
void intel_crtc_update_dpms(struct drm_crtc *crtc); void intel_crtc_update_dpms(struct drm_crtc *crtc);
void intel_encoder_destroy(struct drm_encoder *encoder); void intel_encoder_destroy(struct drm_encoder *encoder);
void intel_connector_dpms(struct drm_connector *, int mode); void intel_connector_dpms(struct drm_connector *, int mode);
......
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