Commit b0a53b4f authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mfd-next-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:

 - Added support for the Analog Devices ADP5585 GPIO and PWM functions

 - Added parsing of GPIO hogs for the ADP5585

 - Fixed module autoloading in the MAX14577 driver

 - Simplified and cleaned up the CROS_EC driver

 - Made the Lenovo Yoga Tab 3 X90F DMI match less strict in the
   INTEL_SOC_PMIC_CHTWC driver

 - Added support for the RK806 PMIC on the I2C bus

 - Removed the remaining header file for the DS1WM driver

 - Added compatible strings for various devices in the device tree
   bindings

 - Fixed a comma-related issue in the 88PM860X_CORE driver

 - Constified read-only regmap structs in various drivers

 - Used scoped variables with memory allocators to simplify error paths
   in the MT6360 and SYSCON drivers

 - Added Intel Arrow Lake-H and Panther Lake LPSS PCI IDs

* tag 'mfd-next-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (44 commits)
  mfd: atc260x: Convert a bunch of commas to semicolons
  dt-bindings: mfd: qcom,tcsr: Add compatible for sa8775p
  mfd: intel-lpss: Add Intel Panther Lake LPSS PCI IDs
  mfd: intel-lpss: Add Intel Arrow Lake-H LPSS PCI IDs
  dt-bindings: mfd: syscon: Add rk3576 QoS register compatible
  dt-bindings: mfd: adp5585: Add parsing of hogs
  mfd: tc3589x: Drop vendorless compatible string from match table
  mfd: qcom-spmi-pmic: Use for_each_child_of_node_scoped()
  mfd: max77620: Use for_each_child_of_node_scoped()
  mfd: intel_soc_pmic_chtwc: Make Lenovo Yoga Tab 3 X90F DMI match less strict
  mfd: cros_ec: Update module description
  mfd: cros_ec: Simplify and clean-up cros_ec_dev_init()
  mfd: max14577: Provide MODULE_DEVICE_TABLE() to fix module autoloading
  mfd: rk8xx: Add support for rk806 on i2c bus
  dt-bindings: mfd: syscon: Add ti,j784s4-acspcie-proxy-ctrl compatible
  mfd: ds1wm: Remove remaining header file
  MAINTAINERS: Repair file entry in MARVELL 88PM886 PMIC DRIVER
  mfd: 88pm860x-core: Convert comma to semicolon
  mfd: syscon: Use scoped variables with memory allocators to simplify error paths
  mfd: mt6360: Use scoped variables with memory allocators to simplify error paths
  ...
parents 8874d92b 91dba615
......@@ -42,6 +42,13 @@ properties:
"#pwm-cells":
const: 3
patternProperties:
"-hog(-[0-9]+)?$":
type: object
required:
- gpio-hog
required:
- compatible
- reg
......
......@@ -21,6 +21,7 @@ properties:
- qcom,msm8998-tcsr
- qcom,qcm2290-tcsr
- qcom,qcs404-tcsr
- qcom,sa8775p-tcsr
- qcom,sc7180-tcsr
- qcom,sc7280-tcsr
- qcom,sc8280xp-tcsr
......
......@@ -103,6 +103,7 @@ select:
- rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3568-qos
- rockchip,rk3576-qos
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- st,spear1340-misc
......@@ -113,6 +114,7 @@ select:
- ti,am625-dss-oldi-io-ctrl
- ti,am62p-cpsw-mac-efuse
- ti,am654-dss-oldi-io-ctrl
- ti,j784s4-acspcie-proxy-ctrl
- ti,j784s4-pcie-ctrl
- ti,keystone-pllctrl
required:
......@@ -198,6 +200,7 @@ properties:
- rockchip,rk3368-qos
- rockchip,rk3399-qos
- rockchip,rk3568-qos
- rockchip,rk3576-qos
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- st,spear1340-misc
......
......@@ -13636,7 +13636,7 @@ S: Maintained
F: Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml
F: drivers/input/misc/88pm886-onkey.c
F: drivers/mfd/88pm886.c
F: drivers/regulators/88pm886-regulator.c
F: drivers/regulator/88pm886-regulator.c
F: include/linux/mfd/88pm886.h
MARVELL ARMADA 3700 PHY DRIVERS
......
......@@ -391,7 +391,7 @@ static void device_irq_exit_800(struct pm80x_chip *chip)
regmap_del_irq_chip(chip->irq, chip->irq_data);
}
static struct regmap_irq_chip pm800_irq_chip = {
static const struct regmap_irq_chip pm800_irq_chip = {
.name = "88pm800",
.irqs = pm800_irqs,
.num_irqs = ARRAY_SIZE(pm800_irqs),
......
......@@ -73,7 +73,7 @@ static const struct mfd_cell codec_devs[] = {
},
};
static struct regmap_irq pm805_irqs[] = {
static const struct regmap_irq pm805_irqs[] = {
/* INT0 */
[PM805_IRQ_LDO_OFF] = {
.mask = PM805_INT1_HP1_SHRT,
......@@ -163,7 +163,7 @@ static void device_irq_exit_805(struct pm80x_chip *chip)
regmap_del_irq_chip(chip->irq, chip->irq_data);
}
static struct regmap_irq_chip pm805_irq_chip = {
static const struct regmap_irq_chip pm805_irq_chip = {
.name = "88pm805",
.irqs = pm805_irqs,
.num_irqs = ARRAY_SIZE(pm805_irqs),
......
......@@ -916,7 +916,7 @@ static void device_power_init(struct pm860x_chip *chip,
power_devs[0].platform_data = pdata->power;
power_devs[0].pdata_size = sizeof(struct pm860x_power_pdata);
power_devs[0].num_resources = ARRAY_SIZE(battery_resources);
power_devs[0].resources = &battery_resources[0],
power_devs[0].resources = &battery_resources[0];
ret = mfd_add_devices(chip->dev, 0, &power_devs[0], 1,
&battery_resources[0], chip->irq_base, NULL);
if (ret < 0)
......@@ -925,7 +925,7 @@ static void device_power_init(struct pm860x_chip *chip,
power_devs[1].platform_data = pdata->power;
power_devs[1].pdata_size = sizeof(struct pm860x_power_pdata);
power_devs[1].num_resources = ARRAY_SIZE(charger_resources);
power_devs[1].resources = &charger_resources[0],
power_devs[1].resources = &charger_resources[0];
ret = mfd_add_devices(chip->dev, 0, &power_devs[1], 1,
&charger_resources[0], chip->irq_base, NULL);
if (ret < 0)
......@@ -942,7 +942,7 @@ static void device_power_init(struct pm860x_chip *chip,
pdata->chg_desc->charger_regulators =
&chg_desc_regulator_data[0];
pdata->chg_desc->num_charger_regulators =
ARRAY_SIZE(chg_desc_regulator_data),
ARRAY_SIZE(chg_desc_regulator_data);
power_devs[3].platform_data = pdata->chg_desc;
power_devs[3].pdata_size = sizeof(*pdata->chg_desc);
ret = mfd_add_devices(chip->dev, 0, &power_devs[3], 1,
......@@ -958,7 +958,7 @@ static void device_onkey_init(struct pm860x_chip *chip,
int ret;
onkey_devs[0].num_resources = ARRAY_SIZE(onkey_resources);
onkey_devs[0].resources = &onkey_resources[0],
onkey_devs[0].resources = &onkey_resources[0];
ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
ARRAY_SIZE(onkey_devs), &onkey_resources[0],
chip->irq_base, NULL);
......@@ -972,7 +972,7 @@ static void device_codec_init(struct pm860x_chip *chip,
int ret;
codec_devs[0].num_resources = ARRAY_SIZE(codec_resources);
codec_devs[0].resources = &codec_resources[0],
codec_devs[0].resources = &codec_resources[0];
ret = mfd_add_devices(chip->dev, 0, &codec_devs[0],
ARRAY_SIZE(codec_devs), &codec_resources[0], 0,
NULL);
......
......@@ -235,8 +235,8 @@ int atc260x_match_device(struct atc260x *atc260x, struct regmap_config *regmap_c
mutex_init(atc260x->regmap_mutex);
regmap_cfg->lock = regmap_lock_mutex,
regmap_cfg->unlock = regmap_unlock_mutex,
regmap_cfg->lock = regmap_lock_mutex;
regmap_cfg->unlock = regmap_unlock_mutex;
regmap_cfg->lock_arg = atc260x->regmap_mutex;
return 0;
......
......@@ -93,7 +93,7 @@ static const struct regmap_irq bd9571mwv_irqs[] = {
BD9571MWV_INT_INTREQ_BKUP_TRG_INT),
};
static struct regmap_irq_chip bd9571mwv_irq_chip = {
static const struct regmap_irq_chip bd9571mwv_irq_chip = {
.name = "bd9571mwv",
.status_base = BD9571MWV_INT_INTREQ,
.mask_base = BD9571MWV_INT_INTMASK,
......@@ -159,7 +159,7 @@ static const struct regmap_config bd9574mwf_regmap_config = {
.max_register = 0xff,
};
static struct regmap_irq_chip bd9574mwf_irq_chip = {
static const struct regmap_irq_chip bd9574mwf_irq_chip = {
.name = "bd9574mwf",
.status_base = BD9571MWV_INT_INTREQ,
.mask_base = BD9571MWV_INT_INTMASK,
......
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* cros_ec_dev - expose the Chrome OS Embedded Controller to user-space
* ChromeOS Embedded Controller
*
* Copyright (C) 2014 Google, Inc.
*/
......@@ -359,16 +359,11 @@ static int __init cros_ec_dev_init(void)
return ret;
}
/* Register the driver */
ret = platform_driver_register(&cros_ec_dev_driver);
if (ret < 0) {
if (ret) {
pr_warn(CROS_EC_DEV_NAME ": can't register driver: %d\n", ret);
goto failed_devreg;
}
return 0;
failed_devreg:
class_unregister(&cros_class);
}
return ret;
}
......@@ -382,6 +377,6 @@ module_init(cros_ec_dev_init);
module_exit(cros_ec_dev_exit);
MODULE_AUTHOR("Bill Richardson <wfrichar@chromium.org>");
MODULE_DESCRIPTION("Userspace interface to the Chrome OS Embedded Controller");
MODULE_DESCRIPTION("ChromeOS Embedded Controller");
MODULE_VERSION("1.0");
MODULE_LICENSE("GPL");
......@@ -25,7 +25,7 @@
#define DA9062_IRQ_LOW 0
#define DA9062_IRQ_HIGH 1
static struct regmap_irq da9061_irqs[] = {
static const struct regmap_irq da9061_irqs[] = {
/* EVENT A */
[DA9061_IRQ_ONKEY] = {
.reg_offset = DA9062_REG_EVENT_A_OFFSET,
......@@ -79,7 +79,7 @@ static struct regmap_irq da9061_irqs[] = {
},
};
static struct regmap_irq_chip da9061_irq_chip = {
static const struct regmap_irq_chip da9061_irq_chip = {
.name = "da9061-irq",
.irqs = da9061_irqs,
.num_irqs = DA9061_NUM_IRQ,
......@@ -89,7 +89,7 @@ static struct regmap_irq_chip da9061_irq_chip = {
.ack_base = DA9062AA_EVENT_A,
};
static struct regmap_irq da9062_irqs[] = {
static const struct regmap_irq da9062_irqs[] = {
/* EVENT A */
[DA9062_IRQ_ONKEY] = {
.reg_offset = DA9062_REG_EVENT_A_OFFSET,
......@@ -151,7 +151,7 @@ static struct regmap_irq da9062_irqs[] = {
},
};
static struct regmap_irq_chip da9062_irq_chip = {
static const struct regmap_irq_chip da9062_irq_chip = {
.name = "da9062-irq",
.irqs = da9062_irqs,
.num_irqs = DA9062_NUM_IRQ,
......@@ -470,7 +470,7 @@ static const struct regmap_range_cfg da9061_range_cfg[] = {
}
};
static struct regmap_config da9061_regmap_config = {
static const struct regmap_config da9061_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.ranges = da9061_range_cfg,
......@@ -576,7 +576,7 @@ static const struct regmap_range_cfg da9062_range_cfg[] = {
}
};
static struct regmap_config da9062_regmap_config = {
static const struct regmap_config da9062_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.ranges = da9062_range_cfg,
......
......@@ -16,7 +16,7 @@
#include <linux/platform_device.h>
#include <linux/regmap.h>
static struct regmap_config mx25_tsadc_regmap_config = {
static const struct regmap_config mx25_tsadc_regmap_config = {
.fast_io = true,
.max_register = 8,
.reg_bits = 32,
......
......@@ -160,7 +160,7 @@ static const struct of_device_id gsc_of_match[] = {
};
MODULE_DEVICE_TABLE(of, gsc_of_match);
static struct regmap_bus gsc_regmap_bus = {
static const struct regmap_bus gsc_regmap_bus = {
.reg_read = gsc_read,
.reg_write = gsc_write,
};
......
......@@ -41,7 +41,7 @@ static const struct regmap_irq_chip hi655x_irq_chip = {
.mask_base = HI655X_IRQ_MASK_BASE,
};
static struct regmap_config hi655x_regmap_config = {
static const struct regmap_config hi655x_regmap_config = {
.reg_bits = 32,
.reg_stride = HI655X_STRIDE,
.val_bits = 8,
......
......@@ -424,6 +424,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_spi_info },
{ PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_spi_info },
{ PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info },
/* ARL-H */
{ PCI_VDEVICE(INTEL, 0x7725), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7726), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7727), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0x7730), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0x7746), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0x7750), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7751), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7752), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7778), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x7779), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x777a), (kernel_ulong_t)&bxt_i2c_info },
{ PCI_VDEVICE(INTEL, 0x777b), (kernel_ulong_t)&bxt_i2c_info },
/* RPL-S */
{ PCI_VDEVICE(INTEL, 0x7a28), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0x7a29), (kernel_ulong_t)&bxt_uart_info },
......@@ -594,6 +607,32 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0xa879), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa87a), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xa87b), (kernel_ulong_t)&ehl_i2c_info },
/* PTL-H */
{ PCI_VDEVICE(INTEL, 0xe325), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe326), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe327), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe330), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe346), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe350), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe351), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe352), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe378), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe379), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe37a), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe37b), (kernel_ulong_t)&ehl_i2c_info },
/* PTL-P */
{ PCI_VDEVICE(INTEL, 0xe425), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe426), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe427), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe430), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe446), (kernel_ulong_t)&tgl_spi_info },
{ PCI_VDEVICE(INTEL, 0xe450), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe451), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe452), (kernel_ulong_t)&bxt_uart_info },
{ PCI_VDEVICE(INTEL, 0xe478), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe479), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe47a), (kernel_ulong_t)&ehl_i2c_info },
{ PCI_VDEVICE(INTEL, 0xe47b), (kernel_ulong_t)&ehl_i2c_info },
{ }
};
MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids);
......
......@@ -336,7 +336,7 @@ static const struct regmap_access_table m10bmc_pmci_access_table = {
.n_yes_ranges = ARRAY_SIZE(m10bmc_pmci_regmap_range),
};
static struct regmap_config m10bmc_pmci_regmap_config = {
static const struct regmap_config m10bmc_pmci_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
......
......@@ -24,7 +24,7 @@ static const struct regmap_access_table m10bmc_access_table = {
.n_yes_ranges = ARRAY_SIZE(m10bmc_regmap_range),
};
static struct regmap_config intel_m10bmc_regmap_config = {
static const struct regmap_config intel_m10bmc_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
......
......@@ -137,7 +137,7 @@ static const struct regmap_irq bxtwc_regmap_irqs_crit[] = {
REGMAP_IRQ_REG(BXTWC_CRIT_IRQ, 0, GENMASK(1, 0)),
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip = {
.name = "bxtwc_irq_chip",
.status_base = BXTWC_IRQLVL1,
.mask_base = BXTWC_MIRQLVL1,
......@@ -146,7 +146,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip = {
.num_regs = 1,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_pwrbtn = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_pwrbtn = {
.name = "bxtwc_irq_chip_pwrbtn",
.status_base = BXTWC_PWRBTNIRQ,
.mask_base = BXTWC_MPWRBTNIRQ,
......@@ -155,7 +155,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_pwrbtn = {
.num_regs = 1,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = {
.name = "bxtwc_irq_chip_tmu",
.status_base = BXTWC_TMUIRQ,
.mask_base = BXTWC_MTMUIRQ,
......@@ -164,7 +164,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = {
.num_regs = 1,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_bcu = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_bcu = {
.name = "bxtwc_irq_chip_bcu",
.status_base = BXTWC_BCUIRQ,
.mask_base = BXTWC_MBCUIRQ,
......@@ -173,7 +173,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_bcu = {
.num_regs = 1,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_adc = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_adc = {
.name = "bxtwc_irq_chip_adc",
.status_base = BXTWC_ADCIRQ,
.mask_base = BXTWC_MADCIRQ,
......@@ -182,7 +182,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_adc = {
.num_regs = 1,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_chgr = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_chgr = {
.name = "bxtwc_irq_chip_chgr",
.status_base = BXTWC_CHGR0IRQ,
.mask_base = BXTWC_MCHGR0IRQ,
......@@ -191,7 +191,7 @@ static struct regmap_irq_chip bxtwc_regmap_irq_chip_chgr = {
.num_regs = 2,
};
static struct regmap_irq_chip bxtwc_regmap_irq_chip_crit = {
static const struct regmap_irq_chip bxtwc_regmap_irq_chip_crit = {
.name = "bxtwc_irq_chip_crit",
.status_base = BXTWC_CRITIRQ,
.mask_base = BXTWC_MCRITIRQ,
......
......@@ -178,7 +178,6 @@ static const struct dmi_system_id cht_wc_model_dmi_ids[] = {
.driver_data = (void *)(long)INTEL_CHT_WC_LENOVO_YT3_X90,
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
},
},
......
......@@ -143,6 +143,7 @@ static const struct of_device_id max14577_dt_match[] = {
},
{},
};
MODULE_DEVICE_TABLE(of, max14577_dt_match);
static bool max14577_muic_volatile_reg(struct device *dev, unsigned int reg)
{
......
......@@ -400,7 +400,7 @@ static int max77620_config_fps(struct max77620_chip *chip,
static int max77620_initialise_fps(struct max77620_chip *chip)
{
struct device *dev = chip->dev;
struct device_node *fps_np, *fps_child;
struct device_node *fps_np;
u8 config;
int fps_id;
int ret;
......@@ -414,10 +414,9 @@ static int max77620_initialise_fps(struct max77620_chip *chip)
if (!fps_np)
goto skip_fps;
for_each_child_of_node(fps_np, fps_child) {
for_each_child_of_node_scoped(fps_np, fps_child) {
ret = max77620_config_fps(chip, fps_child);
if (ret < 0) {
of_node_put(fps_child);
of_node_put(fps_np);
return ret;
}
......
......@@ -116,7 +116,7 @@ static int mc13xxx_spi_write(void *context, const void *data, size_t count)
* single transfer.
*/
static struct regmap_bus regmap_mc13xxx_bus = {
static const struct regmap_bus regmap_mc13xxx_bus = {
.write = mc13xxx_spi_write,
.read = mc13xxx_spi_read,
};
......
......@@ -5,6 +5,7 @@
* Author: Gene Chen <gene_chen@richtek.com>
*/
#include <linux/cleanup.h>
#include <linux/crc8.h>
#include <linux/i2c.h>
#include <linux/init.h>
......@@ -404,7 +405,6 @@ static int mt6360_regmap_read(void *context, const void *reg, size_t reg_size,
u8 reg_addr = *(u8 *)(reg + 1);
struct i2c_client *i2c;
bool crc_needed = false;
u8 *buf;
int buf_len = MT6360_ALLOC_READ_SIZE(val_size);
int read_size = val_size;
u8 crc;
......@@ -423,7 +423,7 @@ static int mt6360_regmap_read(void *context, const void *reg, size_t reg_size,
read_size += MT6360_CRC_CRC8_SIZE;
}
buf = kzalloc(buf_len, GFP_KERNEL);
u8 *buf __free(kfree) = kzalloc(buf_len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
......@@ -433,24 +433,19 @@ static int mt6360_regmap_read(void *context, const void *reg, size_t reg_size,
ret = i2c_smbus_read_i2c_block_data(i2c, reg_addr, read_size,
buf + MT6360_CRC_PREDATA_OFFSET);
if (ret < 0)
goto out;
else if (ret != read_size) {
ret = -EIO;
goto out;
}
return ret;
else if (ret != read_size)
return -EIO;
if (crc_needed) {
crc = crc8(ddata->crc8_tbl, buf, val_size + MT6360_CRC_PREDATA_OFFSET, 0);
if (crc != buf[val_size + MT6360_CRC_PREDATA_OFFSET]) {
ret = -EIO;
goto out;
}
if (crc != buf[val_size + MT6360_CRC_PREDATA_OFFSET])
return -EIO;
}
memcpy(val, buf + MT6360_CRC_PREDATA_OFFSET, val_size);
out:
kfree(buf);
return (ret < 0) ? ret : 0;
return 0;
}
static int mt6360_regmap_write(void *context, const void *val, size_t val_size)
......
......@@ -84,7 +84,6 @@ static const struct of_device_id pmic_spmi_id_table[] = {
static struct spmi_device *qcom_pmic_get_base_usid(struct spmi_device *sdev, struct qcom_spmi_dev *ctx)
{
struct device_node *spmi_bus;
struct device_node *child;
int function_parent_usid, ret;
u32 pmic_addr;
......@@ -108,10 +107,9 @@ static struct spmi_device *qcom_pmic_get_base_usid(struct spmi_device *sdev, str
*/
spmi_bus = of_get_parent(sdev->dev.of_node);
sdev = ERR_PTR(-ENODATA);
for_each_child_of_node(spmi_bus, child) {
for_each_child_of_node_scoped(spmi_bus, child) {
ret = of_property_read_u32_index(child, "reg", 0, &pmic_addr);
if (ret) {
of_node_put(child);
sdev = ERR_PTR(ret);
break;
}
......@@ -125,7 +123,6 @@ static struct spmi_device *qcom_pmic_get_base_usid(struct spmi_device *sdev, str
*/
sdev = ERR_PTR(-EPROBE_DEFER);
}
of_node_put(child);
break;
}
}
......
......@@ -65,13 +65,13 @@ static const struct mfd_cell retu_devs[] = {
}
};
static struct regmap_irq retu_irqs[] = {
static const struct regmap_irq retu_irqs[] = {
[RETU_INT_PWR] = {
.mask = 1 << RETU_INT_PWR,
}
};
static struct regmap_irq_chip retu_irq_chip = {
static const struct regmap_irq_chip retu_irq_chip = {
.name = "RETU",
.irqs = retu_irqs,
.num_irqs = ARRAY_SIZE(retu_irqs),
......@@ -101,13 +101,13 @@ static const struct mfd_cell tahvo_devs[] = {
},
};
static struct regmap_irq tahvo_irqs[] = {
static const struct regmap_irq tahvo_irqs[] = {
[TAHVO_INT_VBUS] = {
.mask = 1 << TAHVO_INT_VBUS,
}
};
static struct regmap_irq_chip tahvo_irq_chip = {
static const struct regmap_irq_chip tahvo_irq_chip = {
.name = "TAHVO",
.irqs = tahvo_irqs,
.num_irqs = ARRAY_SIZE(tahvo_irqs),
......@@ -120,7 +120,7 @@ static struct regmap_irq_chip tahvo_irq_chip = {
static const struct retu_data {
char *chip_name;
char *companion_name;
struct regmap_irq_chip *irq_chip;
const struct regmap_irq_chip *irq_chip;
const struct mfd_cell *children;
int nchildren;
} retu_data[] = {
......@@ -216,7 +216,7 @@ static int retu_regmap_write(void *context, const void *data, size_t count)
return i2c_smbus_write_word_data(i2c, reg, val);
}
static struct regmap_bus retu_bus = {
static const struct regmap_bus retu_bus = {
.read = retu_regmap_read,
.write = retu_regmap_write,
.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
......
......@@ -531,7 +531,7 @@ static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
REGMAP_IRQ_REG_LINE(23, 8)
};
static struct regmap_irq_chip rk805_irq_chip = {
static const struct regmap_irq_chip rk805_irq_chip = {
.name = "rk805",
.irqs = rk805_irqs,
.num_irqs = ARRAY_SIZE(rk805_irqs),
......@@ -542,7 +542,7 @@ static struct regmap_irq_chip rk805_irq_chip = {
.init_ack_masked = true,
};
static struct regmap_irq_chip rk806_irq_chip = {
static const struct regmap_irq_chip rk806_irq_chip = {
.name = "rk806",
.irqs = rk806_irqs,
.num_irqs = ARRAY_SIZE(rk806_irqs),
......@@ -578,7 +578,7 @@ static const struct regmap_irq_chip rk816_irq_chip = {
.init_ack_masked = true,
};
static struct regmap_irq_chip rk817_irq_chip = {
static const struct regmap_irq_chip rk817_irq_chip = {
.name = "rk817",
.irqs = rk817_irqs,
.num_irqs = ARRAY_SIZE(rk817_irqs),
......
......@@ -21,6 +21,17 @@ struct rk8xx_i2c_platform_data {
int variant;
};
static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case RK806_POWER_EN0 ... RK806_POWER_EN5:
case RK806_DVS_START_CTRL ... RK806_INT_MSK1:
return true;
}
return false;
}
static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
{
/*
......@@ -121,6 +132,14 @@ static const struct regmap_config rk805_regmap_config = {
.volatile_reg = rk808_is_volatile_reg,
};
static const struct regmap_config rk806_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = RK806_BUCK_RSERVE_REG5,
.cache_type = REGCACHE_MAPLE,
.volatile_reg = rk806_is_volatile_reg,
};
static const struct regmap_config rk808_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
......@@ -150,6 +169,11 @@ static const struct rk8xx_i2c_platform_data rk805_data = {
.variant = RK805_ID,
};
static const struct rk8xx_i2c_platform_data rk806_data = {
.regmap_cfg = &rk806_regmap_config,
.variant = RK806_ID,
};
static const struct rk8xx_i2c_platform_data rk808_data = {
.regmap_cfg = &rk808_regmap_config,
.variant = RK808_ID,
......@@ -201,6 +225,7 @@ static SIMPLE_DEV_PM_OPS(rk8xx_i2c_pm_ops, rk8xx_suspend, rk8xx_resume);
static const struct of_device_id rk8xx_i2c_of_match[] = {
{ .compatible = "rockchip,rk805", .data = &rk805_data },
{ .compatible = "rockchip,rk806", .data = &rk806_data },
{ .compatible = "rockchip,rk808", .data = &rk808_data },
{ .compatible = "rockchip,rk809", .data = &rk809_data },
{ .compatible = "rockchip,rk816", .data = &rk816_data },
......
......@@ -316,7 +316,7 @@ static const struct regmap_irq bd71815_irqs[] = {
REGMAP_IRQ_REG(BD71815_INT_RTC2, 11, BD71815_INT_RTC2_MASK),
};
static struct regmap_irq bd71828_irqs[] = {
static const struct regmap_irq bd71828_irqs[] = {
REGMAP_IRQ_REG(BD71828_INT_BUCK1_OCP, 0, BD71828_INT_BUCK1_OCP_MASK),
REGMAP_IRQ_REG(BD71828_INT_BUCK2_OCP, 0, BD71828_INT_BUCK2_OCP_MASK),
REGMAP_IRQ_REG(BD71828_INT_BUCK3_OCP, 0, BD71828_INT_BUCK3_OCP_MASK),
......@@ -407,7 +407,7 @@ static struct regmap_irq bd71828_irqs[] = {
REGMAP_IRQ_REG(BD71828_INT_RTC2, 11, BD71828_INT_RTC2_MASK),
};
static struct regmap_irq_chip bd71828_irq_chip = {
static const struct regmap_irq_chip bd71828_irq_chip = {
.name = "bd71828_irq",
.main_status = BD71828_REG_INT_MAIN,
.irqs = &bd71828_irqs[0],
......@@ -423,7 +423,7 @@ static struct regmap_irq_chip bd71828_irq_chip = {
.irq_reg_stride = 1,
};
static struct regmap_irq_chip bd71815_irq_chip = {
static const struct regmap_irq_chip bd71815_irq_chip = {
.name = "bd71815_irq",
.main_status = BD71815_REG_INT_STAT,
.irqs = &bd71815_irqs[0],
......@@ -491,7 +491,7 @@ static int bd71828_i2c_probe(struct i2c_client *i2c)
int ret;
struct regmap *regmap;
const struct regmap_config *regmap_config;
struct regmap_irq_chip *irqchip;
const struct regmap_irq_chip *irqchip;
unsigned int chip_type;
struct mfd_cell *mfd;
int cells;
......
......@@ -60,7 +60,7 @@ static const struct regmap_irq bd718xx_irqs[] = {
REGMAP_IRQ_REG(BD718XX_INT_STBY_REQ, 0, BD718XX_INT_STBY_REQ_MASK),
};
static struct regmap_irq_chip bd718xx_irq_chip = {
static const struct regmap_irq_chip bd718xx_irq_chip = {
.name = "bd718xx-irq",
.irqs = bd718xx_irqs,
.num_irqs = ARRAY_SIZE(bd718xx_irqs),
......
......@@ -57,7 +57,7 @@ static const struct regmap_access_table volatile_regs = {
.n_yes_ranges = ARRAY_SIZE(volatile_ranges),
};
static struct regmap_config bd957x_regmap = {
static const struct regmap_config bd957x_regmap = {
.reg_bits = 8,
.val_bits = 8,
.volatile_table = &volatile_regs,
......@@ -65,7 +65,7 @@ static struct regmap_config bd957x_regmap = {
.cache_type = REGCACHE_MAPLE,
};
static struct regmap_irq bd9576_irqs[] = {
static const struct regmap_irq bd9576_irqs[] = {
REGMAP_IRQ_REG(BD9576_INT_THERM, 0, BD957X_MASK_INT_MAIN_THERM),
REGMAP_IRQ_REG(BD9576_INT_OVP, 0, BD957X_MASK_INT_MAIN_OVP),
REGMAP_IRQ_REG(BD9576_INT_SCP, 0, BD957X_MASK_INT_MAIN_SCP),
......@@ -76,7 +76,7 @@ static struct regmap_irq bd9576_irqs[] = {
REGMAP_IRQ_REG(BD9576_INT_SYS, 0, BD957X_MASK_INT_MAIN_SYS),
};
static struct regmap_irq_chip bd9576_irq_chip = {
static const struct regmap_irq_chip bd9576_irq_chip = {
.name = "bd9576_irq",
.irqs = &bd9576_irqs[0],
.num_irqs = ARRAY_SIZE(bd9576_irqs),
......
......@@ -135,7 +135,7 @@ static int sprd_pmic_spi_read(void *context,
return 0;
}
static struct regmap_bus sprd_pmic_regmap = {
static const struct regmap_bus sprd_pmic_regmap = {
.write = sprd_pmic_spi_write,
.read = sprd_pmic_spi_read,
.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
......
......@@ -8,6 +8,7 @@
* Author: Dong Aisheng <dong.aisheng@linaro.org>
*/
#include <linux/cleanup.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/hwspinlock.h>
......@@ -45,7 +46,6 @@ static const struct regmap_config syscon_regmap_config = {
static struct syscon *of_syscon_register(struct device_node *np, bool check_res)
{
struct clk *clk;
struct syscon *syscon;
struct regmap *regmap;
void __iomem *base;
u32 reg_io_width;
......@@ -54,20 +54,16 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res)
struct resource res;
struct reset_control *reset;
syscon = kzalloc(sizeof(*syscon), GFP_KERNEL);
struct syscon *syscon __free(kfree) = kzalloc(sizeof(*syscon), GFP_KERNEL);
if (!syscon)
return ERR_PTR(-ENOMEM);
if (of_address_to_resource(np, 0, &res)) {
ret = -ENOMEM;
goto err_map;
}
if (of_address_to_resource(np, 0, &res))
return ERR_PTR(-ENOMEM);
base = of_iomap(np, 0);
if (!base) {
ret = -ENOMEM;
goto err_map;
}
if (!base)
return ERR_PTR(-ENOMEM);
/* Parse the device's DT node for an endianness specification */
if (of_property_read_bool(np, "big-endian"))
......@@ -152,7 +148,7 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res)
list_add_tail(&syscon->list, &syscon_list);
spin_unlock(&syscon_list_slock);
return syscon;
return_ptr(syscon);
err_reset:
reset_control_put(reset);
......@@ -163,8 +159,6 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res)
regmap_exit(regmap);
err_regmap:
iounmap(base);
err_map:
kfree(syscon);
return ERR_PTR(ret);
}
......
......@@ -312,8 +312,6 @@ static int tc3589x_device_init(struct tc3589x *tc3589x)
}
static const struct of_device_id tc3589x_match[] = {
/* Legacy compatible string */
{ .compatible = "tc3589x", .data = (void *) TC3589X_UNKNOWN },
{ .compatible = "toshiba,tc35890", .data = (void *) TC3589X_TC35890 },
{ .compatible = "toshiba,tc35892", .data = (void *) TC3589X_TC35892 },
{ .compatible = "toshiba,tc35893", .data = (void *) TC3589X_TC35893 },
......
......@@ -23,7 +23,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/tps6105x.h>
static struct regmap_config tps6105x_regmap_config = {
static const struct regmap_config tps6105x_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = TPS6105X_REG_3,
......
......@@ -45,7 +45,7 @@ static const struct regmap_irq tps65086_irqs[] = {
REGMAP_IRQ_REG(TPS65086_IRQ_FAULT, 0, TPS65086_IRQ_FAULT_MASK),
};
static struct regmap_irq_chip tps65086_irq_chip = {
static const struct regmap_irq_chip tps65086_irq_chip = {
.name = "tps65086",
.status_base = TPS65086_IRQ,
.mask_base = TPS65086_IRQ_MASK,
......
......@@ -120,7 +120,7 @@ static const struct regmap_irq tps65090_irqs[] = {
},
};
static struct regmap_irq_chip tps65090_irq_chip = {
static const struct regmap_irq_chip tps65090_irq_chip = {
.name = "tps65090",
.irqs = tps65090_irqs,
.num_irqs = ARRAY_SIZE(tps65090_irqs),
......
......@@ -186,7 +186,7 @@ static const struct regmap_irq tps65218_irqs[] = {
},
};
static struct regmap_irq_chip tps65218_irq_chip = {
static const struct regmap_irq_chip tps65218_irq_chip = {
.name = "tps65218",
.irqs = tps65218_irqs,
.num_irqs = ARRAY_SIZE(tps65218_irqs),
......
......@@ -159,7 +159,7 @@ static struct regmap_irq_sub_irq_map tps65219_sub_irq_offsets[] = {
#define TPS65219_REGMAP_IRQ_REG(int_name, register_position) \
REGMAP_IRQ_REG(int_name, register_position, int_name##_MASK)
static struct regmap_irq tps65219_irqs[] = {
static const struct regmap_irq tps65219_irqs[] = {
TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_SCG, TPS65219_REG_INT_LDO_3_4_POS),
TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_OC, TPS65219_REG_INT_LDO_3_4_POS),
TPS65219_REGMAP_IRQ_REG(TPS65219_INT_LDO3_UV, TPS65219_REG_INT_LDO_3_4_POS),
......@@ -211,7 +211,7 @@ static struct regmap_irq tps65219_irqs[] = {
TPS65219_REGMAP_IRQ_REG(TPS65219_INT_PB_RISING_EDGE_DETECT, TPS65219_REG_INT_PB_POS),
};
static struct regmap_irq_chip tps65219_irq_chip = {
static const struct regmap_irq_chip tps65219_irq_chip = {
.name = "tps65219_irq",
.main_status = TPS65219_REG_INT_SOURCE,
.num_main_regs = 1,
......
......@@ -197,7 +197,7 @@ static const struct regmap_irq tps65910_irqs[] = {
},
};
static struct regmap_irq_chip tps65911_irq_chip = {
static const struct regmap_irq_chip tps65911_irq_chip = {
.name = "tps65910",
.irqs = tps65911_irqs,
.num_irqs = ARRAY_SIZE(tps65911_irqs),
......@@ -208,7 +208,7 @@ static struct regmap_irq_chip tps65911_irq_chip = {
.ack_base = TPS65910_INT_STS,
};
static struct regmap_irq_chip tps65910_irq_chip = {
static const struct regmap_irq_chip tps65910_irq_chip = {
.name = "tps65910",
.irqs = tps65910_irqs,
.num_irqs = ARRAY_SIZE(tps65910_irqs),
......@@ -223,7 +223,7 @@ static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
struct tps65910_platform_data *pdata)
{
int ret;
static struct regmap_irq_chip *tps6591x_irqs_chip;
static const struct regmap_irq_chip *tps6591x_irqs_chip;
if (!irq) {
dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
......
......@@ -57,7 +57,7 @@ static const struct regmap_irq tps65912_irqs[] = {
REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),
};
static struct regmap_irq_chip tps65912_irq_chip = {
static const struct regmap_irq_chip tps65912_irq_chip = {
.name = "tps65912",
.irqs = tps65912_irqs,
.num_irqs = ARRAY_SIZE(tps65912_irqs),
......
......@@ -620,7 +620,7 @@ static const struct regmap_irq twl6040_irqs[] = {
{ .reg_offset = 0, .mask = TWL6040_READYINT, },
};
static struct regmap_irq_chip twl6040_irq_chip = {
static const struct regmap_irq_chip twl6040_irq_chip = {
.name = "twl6040",
.irqs = twl6040_irqs,
.num_irqs = ARRAY_SIZE(twl6040_irqs),
......
......@@ -109,7 +109,7 @@ static const struct regmap_range_cfg wcd934x_ranges[] = {
},
};
static struct regmap_config wcd934x_regmap_config = {
static const struct regmap_config wcd934x_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
.cache_type = REGCACHE_MAPLE,
......
......@@ -294,7 +294,7 @@ struct pm80x_chip {
struct i2c_client *client;
struct i2c_client *companion;
struct regmap *regmap;
struct regmap_irq_chip *regmap_irq_chip;
const struct regmap_irq_chip *regmap_irq_chip;
struct regmap_irq_chip_data *irq_data;
int type;
int irq;
......
/* SPDX-License-Identifier: GPL-2.0 */
/* MFD cell driver data for the DS1WM driver
*
* to be defined in the MFD device that is
* using this driver for one of his sub devices
*/
struct ds1wm_driver_data {
int active_high;
int clock_rate;
/* in milliseconds, the amount of time to
* sleep following a reset pulse. Zero
* should work if your bus devices recover
* time respects the 1-wire spec since the
* ds1wm implements the precise timings of
* a reset pulse/presence detect sequence.
*/
unsigned int reset_recover_delay;
/* Say 1 here for big endian Hardware
* (only relevant with bus-shift > 0
*/
bool is_hw_big_endian;
/* left shift of register number to get register address offsett.
* Only 0,1,2 allowed for 8,16 or 32 bit bus width respectively
*/
unsigned int bus_shift;
};
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