Commit b0d69335 authored by Richard Leitner's avatar Richard Leitner Committed by Greg Kroah-Hartman

misc: ioc4: simplify wave period measurement in clock_calibrate

commit 769105aa upstream.

The loop for measuring the square wave periods over some cycles is
refactored to be more easily readable. This includes avoiding a
"by-hand-implemented" for loop with a "real" one and adding some
comments.

Furthermore the following compiler warning is avoided by this patch:
drivers/misc/ioc4.c: In function ‘ioc4_probe’:
drivers/misc/ioc4.c:194:16: warning: ‘start’ may be used uninitialized
in this function [-Wmaybe-uninitialized]
  period = (end - start) /
                ^
drivers/misc/ioc4.c:148:11: note: ‘start’ was declared here
  uint64_t start, end, period;
           ^
Signed-off-by: default avatarRichard Leitner <dev@g0hl1n.net>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent db65717e
...@@ -144,9 +144,9 @@ ioc4_clock_calibrate(struct ioc4_driver_data *idd) ...@@ -144,9 +144,9 @@ ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{ {
union ioc4_int_out int_out; union ioc4_int_out int_out;
union ioc4_gpcr gpcr; union ioc4_gpcr gpcr;
unsigned int state, last_state = 1; unsigned int state, last_state;
uint64_t start, end, period; uint64_t start, end, period;
unsigned int count = 0; unsigned int count;
/* Enable output */ /* Enable output */
gpcr.raw = 0; gpcr.raw = 0;
...@@ -167,19 +167,20 @@ ioc4_clock_calibrate(struct ioc4_driver_data *idd) ...@@ -167,19 +167,20 @@ ioc4_clock_calibrate(struct ioc4_driver_data *idd)
mmiowb(); mmiowb();
/* Check square wave period averaged over some number of cycles */ /* Check square wave period averaged over some number of cycles */
do { start = ktime_get_ns();
state = 1; /* make sure the first read isn't a rising edge */
for (count = 0; count <= IOC4_CALIBRATE_END; count++) {
do { /* wait for a rising edge */
last_state = state;
int_out.raw = readl(&idd->idd_misc_regs->int_out.raw); int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
state = int_out.fields.int_out; state = int_out.fields.int_out;
if (!last_state && state) { } while (last_state || !state);
count++;
if (count == IOC4_CALIBRATE_END) { /* discard the first few cycles */
end = ktime_get_ns(); if (count == IOC4_CALIBRATE_DISCARD)
break;
} else if (count == IOC4_CALIBRATE_DISCARD)
start = ktime_get_ns(); start = ktime_get_ns();
} }
last_state = state; end = ktime_get_ns();
} while (1);
/* Calculation rearranged to preserve intermediate precision. /* Calculation rearranged to preserve intermediate precision.
* Logically: * Logically:
......
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