Commit b21b6e7a authored by Alex Deucher's avatar Alex Deucher

drm/radeon: halt engines before disabling MC (evergreen)

It's better to halt the engines before we disable the MC.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ca57802e
...@@ -2460,11 +2460,6 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) ...@@ -2460,11 +2460,6 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
evergreen_print_gpu_status_regs(rdev); evergreen_print_gpu_status_regs(rdev);
evergreen_mc_stop(rdev, &save);
if (evergreen_mc_wait_for_idle(rdev)) {
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
}
/* Disable CP parsing/prefetching */ /* Disable CP parsing/prefetching */
WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
...@@ -2475,6 +2470,13 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) ...@@ -2475,6 +2470,13 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
WREG32(DMA_RB_CNTL, tmp); WREG32(DMA_RB_CNTL, tmp);
} }
udelay(50);
evergreen_mc_stop(rdev, &save);
if (evergreen_mc_wait_for_idle(rdev)) {
dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
}
if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) { if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE)) {
grbm_soft_reset |= SOFT_RESET_DB | grbm_soft_reset |= SOFT_RESET_DB |
SOFT_RESET_CB | SOFT_RESET_CB |
......
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