Commit b2420e27 authored by Jaedon Shin's avatar Jaedon Shin Committed by Ralf Baechle

MIPS: BMIPS: Add support SDHCI device nodes

Adds SDHCI device nodes to BCM7xxx MIPS based SoCs.
Signed-off-by: default avatarJaedon Shin <jaedon.shin@gmail.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14002/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c707844d
...@@ -411,5 +411,13 @@ sata_phy1: sata-phy@1 { ...@@ -411,5 +411,13 @@ sata_phy1: sata-phy@1 {
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
sdhci0: sdhci@413500 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x413500 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <85>;
status = "disabled";
};
}; };
}; };
...@@ -330,5 +330,13 @@ sata_phy1: sata-phy@1 { ...@@ -330,5 +330,13 @@ sata_phy1: sata-phy@1 {
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
sdhci0: sdhci@410000 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x410000 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <82>;
status = "disabled";
};
}; };
}; };
...@@ -326,5 +326,13 @@ sata_phy1: sata-phy@1 { ...@@ -326,5 +326,13 @@ sata_phy1: sata-phy@1 {
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
sdhci0: sdhci@410000 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x410000 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <82>;
status = "disabled";
};
}; };
}; };
...@@ -410,5 +410,25 @@ sata_phy1: sata-phy@1 { ...@@ -410,5 +410,25 @@ sata_phy1: sata-phy@1 {
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
sdhci0: sdhci@419000 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x419000 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <43>;
sd-uhs-sdr50;
mmc-hs200-1_8v;
status = "disabled";
};
sdhci1: sdhci@419200 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x419200 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <44>;
sd-uhs-sdr50;
mmc-hs200-1_8v;
status = "disabled";
};
}; };
}; };
...@@ -425,5 +425,25 @@ sata_phy1: sata-phy@1 { ...@@ -425,5 +425,25 @@ sata_phy1: sata-phy@1 {
#phy-cells = <0>; #phy-cells = <0>;
}; };
}; };
sdhci0: sdhci@41a000 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x41a000 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <47>;
sd-uhs-sdr50;
mmc-hs200-1_8v;
status = "disabled";
};
sdhci1: sdhci@41a200 {
compatible = "brcm,bcm7425-sdhci";
reg = <0x41a200 0x100>;
interrupt-parent = <&periph_intc>;
interrupts = <48>;
sd-uhs-sdr50;
mmc-hs200-1_8v;
status = "disabled";
};
}; };
}; };
...@@ -100,3 +100,7 @@ &sata { ...@@ -100,3 +100,7 @@ &sata {
&sata_phy { &sata_phy {
status = "okay"; status = "okay";
}; };
&sdhci0 {
status = "okay";
};
...@@ -68,3 +68,7 @@ &sata { ...@@ -68,3 +68,7 @@ &sata {
&sata_phy { &sata_phy {
status = "okay"; status = "okay";
}; };
&sdhci0 {
status = "okay";
};
...@@ -64,3 +64,7 @@ &sata { ...@@ -64,3 +64,7 @@ &sata {
&sata_phy { &sata_phy {
status = "okay"; status = "okay";
}; };
&sdhci0 {
status = "okay";
};
...@@ -94,3 +94,11 @@ &ehci3 { ...@@ -94,3 +94,11 @@ &ehci3 {
&ohci3 { &ohci3 {
status = "okay"; status = "okay";
}; };
&sdhci0 {
status = "okay";
};
&sdhci1 {
status = "okay";
};
...@@ -102,3 +102,11 @@ &sata { ...@@ -102,3 +102,11 @@ &sata {
&sata_phy { &sata_phy {
status = "okay"; status = "okay";
}; };
&sdhci0 {
status = "okay";
};
&sdhci1 {
status = "okay";
};
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