Commit b31450b7 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

agpgart: Split agpgart code into separate files.

The majority of this work was done by Dave Jones, I merely converted the
driver to the "new" pci api.
parent 182147c1
CONFIG_AGP
AGP (Accelerated Graphics Port) is a bus system mainly used to
connect graphics cards to the rest of the system.
If you have an AGP system and you say Y here, it will be possible to
use the AGP features of your 3D rendering video card. This code acts
as a sort of "AGP driver" for the motherboard's chipset.
If you need more texture memory than you can get with the AGP GART
(theoretically up to 256 MB, but in practice usually 64 or 128 MB
due to kernel allocation issues), you could use PCI accesses
and have up to a couple gigs of texture space.
Note that this is the only means to have XFree4/GLX use
write-combining with MTRR support on the AGP bus. Without it, OpenGL
direct rendering will be a lot slower but still faster than PIO.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
This driver is available as a module. If you want to compile it as
a module, say M here and read <file:Documentation/modules.txt>. The
module will be called agpgart.o.
CONFIG_AGP_INTEL
This option gives you AGP support for the GLX component of the
XFree86 4.x on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850 and 860 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_I810
This option gives you AGP support for the Xserver on the Intel 810
815 and 830m chipset boards for their on-board integrated graphics. This
is required to do any useful video modes with these boards.
CONFIG_AGP_I460
This option gives you AGP GART support for the Intel 460GX chipset
for IA64 processors.
CONFIG_AGP_VIA
This option gives you AGP support for the GLX component of the
XFree86 4.x on VIA MPV3/Apollo Pro chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_AMD
This option gives you AGP support for the GLX component of the
XFree86 4.x on AMD Irongate, 761, and 762 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_SIS
This option gives you AGP support for the GLX component of the "soon
to be released" XFree86 4.x on Silicon Integrated Systems [SiS]
chipsets.
Note that 5591/5592 AGP chipsets are NOT supported.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_SWORKS
Say Y here to support the Serverworks AGP card. See
<http://www.serverworks.com/> for product descriptions and images.
CONFIG_AGP_ALI
This option gives you AGP support for the GLX component of the
XFree86 4.x on the following ALi chipsets. The supported chipsets
include M1541, M1621, M1631, M1632, M1641,M1647,and M1651.
For the ALi-chipset question, ALi suggests you refer to
<http://www.ali.com.tw/eng/support/index.shtml>.
The M1541 chipset can do AGP 1x and 2x, but note that there is an
acknowledged incompatibility with Matrox G200 cards. Due to
timing issues, this chipset cannot do AGP 2x with the G200.
This is a hardware limitation. AGP 1x seems to be fine, though.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
CONFIG_AGP_HP_ZX1
This option gives you AGP GART support for the HP ZX1 chipset
for IA64 processors.
dep_tristate '/dev/agpgart (AGP Support)' CONFIG_AGP $CONFIG_DRM_AGP
if [ "$CONFIG_AGP" != "n" ]; then
bool ' Intel 440LX/BX/GX and I815/I820/I830M/I830MP/I840/I845/I850/I860 support' CONFIG_AGP_INTEL
bool ' Intel I810/I815/I830M (on-board) support' CONFIG_AGP_I810
bool ' VIA chipset support' CONFIG_AGP_VIA
bool ' AMD Irongate, 761, and 762 support' CONFIG_AGP_AMD
bool ' Generic SiS support' CONFIG_AGP_SIS
bool ' ALI chipset support' CONFIG_AGP_ALI
bool ' Serverworks LE/HE support' CONFIG_AGP_SWORKS
if [ "$CONFIG_IA64" = "y" ]; then
bool ' Intel 460GX support' CONFIG_AGP_I460
bool ' HP ZX1 AGP support' CONFIG_AGP_HP_ZX1
fi
fi
...@@ -5,7 +5,18 @@ ...@@ -5,7 +5,18 @@
export-objs := agpgart_be.o export-objs := agpgart_be.o
agpgart-objs := agpgart_fe.o agpgart_be.o agpgart-y := agpgart_fe.o agpgart_be.o
agpgart-$(CONFIG_AGP_INTEL) += agpgart_be-i8x0.o
agpgart-$(CONFIG_AGP_I810) += agpgart_be-i810.o
agpgart-$(CONFIG_AGP_VIA) += agpgart_be-via.o
agpgart-$(CONFIG_AGP_AMD) += agpgart_be-amd.o
agpgart-$(CONFIG_AGP_SIS) += agpgart_be-sis.o
agpgart-$(CONFIG_AGP_ALI) += agpgart_be-ali.o
agpgart-$(CONFIG_AGP_SWORKS) += agpgart_be-sworks.o
agpgart-$(CONFIG_AGP_I460) += agpgart_be-i460.o
agpgart-$(CONFIG_AGP_HP_ZX1) += agpgart_be-hp.o
agpgart-objs := $(agpgart-y)
obj-$(CONFIG_AGP) += agpgart.o obj-$(CONFIG_AGP) += agpgart.o
......
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/*
* AGPGART module version 0.99
* Copyright (C) 1999 Jeff Hartmann
* Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* TODO:
* - Allocate more than order 0 pages to avoid too much linear map splitting.
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
static int ali_fetch_size(void)
{
int i;
u32 temp;
struct aper_size_info_32 *values;
pci_read_config_dword(agp_bridge.dev, ALI_ATTBASE, &temp);
temp &= ~(0xfffffff0);
values = A_SIZE_32(agp_bridge.aperture_sizes);
for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
if (temp == values[i].size_value) {
agp_bridge.previous_size =
agp_bridge.current_size = (void *) (values + i);
agp_bridge.aperture_size_idx = i;
return values[i].size;
}
}
return 0;
}
static void ali_tlbflush(agp_memory * mem)
{
u32 temp;
pci_read_config_dword(agp_bridge.dev, ALI_TLBCTRL, &temp);
// clear tag
pci_write_config_dword(agp_bridge.dev, ALI_TAGCTRL,
((temp & 0xfffffff0) | 0x00000001|0x00000002));
}
static void ali_cleanup(void)
{
struct aper_size_info_32 *previous_size;
u32 temp;
previous_size = A_SIZE_32(agp_bridge.previous_size);
pci_read_config_dword(agp_bridge.dev, ALI_TLBCTRL, &temp);
// clear tag
pci_write_config_dword(agp_bridge.dev, ALI_TAGCTRL,
((temp & 0xffffff00) | 0x00000001|0x00000002));
pci_read_config_dword(agp_bridge.dev, ALI_ATTBASE, &temp);
pci_write_config_dword(agp_bridge.dev, ALI_ATTBASE,
((temp & 0x00000ff0) | previous_size->size_value));
}
static int ali_configure(void)
{
u32 temp;
struct aper_size_info_32 *current_size;
current_size = A_SIZE_32(agp_bridge.current_size);
/* aperture size and gatt addr */
pci_read_config_dword(agp_bridge.dev, ALI_ATTBASE, &temp);
temp = (((temp & 0x00000ff0) | (agp_bridge.gatt_bus_addr & 0xfffff000))
| (current_size->size_value & 0xf));
pci_write_config_dword(agp_bridge.dev, ALI_ATTBASE, temp);
/* tlb control */
/*
* Question: Jeff, ALi's patch deletes this:
*
* pci_read_config_dword(agp_bridge.dev, ALI_TLBCTRL, &temp);
* pci_write_config_dword(agp_bridge.dev, ALI_TLBCTRL,
* ((temp & 0xffffff00) | 0x00000010));
*
* and replaces it with the following, which seems to duplicate the
* next couple of lines below it. I suspect this was an oversight,
* but you might want to check up on this?
*/
pci_read_config_dword(agp_bridge.dev, ALI_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* address to map to */
pci_read_config_dword(agp_bridge.dev, ALI_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
#if 0
if (agp_bridge.type == ALI_M1541) {
u32 nlvm_addr = 0;
switch (current_size->size_value) {
case 0: break;
case 1: nlvm_addr = 0x100000;break;
case 2: nlvm_addr = 0x200000;break;
case 3: nlvm_addr = 0x400000;break;
case 4: nlvm_addr = 0x800000;break;
case 6: nlvm_addr = 0x1000000;break;
case 7: nlvm_addr = 0x2000000;break;
case 8: nlvm_addr = 0x4000000;break;
case 9: nlvm_addr = 0x8000000;break;
case 10: nlvm_addr = 0x10000000;break;
default: break;
}
nlvm_addr--;
nlvm_addr&=0xfff00000;
nlvm_addr+= agp_bridge.gart_bus_addr;
nlvm_addr|=(agp_bridge.gart_bus_addr>>12);
printk(KERN_INFO PFX "nlvm top &base = %8x\n",nlvm_addr);
}
#endif
pci_read_config_dword(agp_bridge.dev, ALI_TLBCTRL, &temp);
temp &= 0xffffff7f; //enable TLB
pci_write_config_dword(agp_bridge.dev, ALI_TLBCTRL, temp);
return 0;
}
static unsigned long ali_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge.masks[0].mask;
}
static void ali_cache_flush(void)
{
global_cache_flush();
if (agp_bridge.type == ALI_M1541) {
int i, page_count;
u32 temp;
page_count = 1 << A_SIZE_32(agp_bridge.current_size)->page_order;
for (i = 0; i < PAGE_SIZE * page_count; i += PAGE_SIZE) {
pci_read_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL, &temp);
pci_write_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL,
(((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
(agp_bridge.gatt_bus_addr + i)) |
ALI_CACHE_FLUSH_EN));
}
}
}
static void *ali_alloc_page(void)
{
void *adr = agp_generic_alloc_page();
u32 temp;
if (adr == 0)
return 0;
if (agp_bridge.type == ALI_M1541) {
pci_read_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL, &temp);
pci_write_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL,
(((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
virt_to_phys(adr)) |
ALI_CACHE_FLUSH_EN ));
}
return adr;
}
static void ali_destroy_page(void * addr)
{
u32 temp;
if (addr == NULL)
return;
global_cache_flush();
if (agp_bridge.type == ALI_M1541) {
pci_read_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL, &temp);
pci_write_config_dword(agp_bridge.dev, ALI_CACHE_FLUSH_CTRL,
(((temp & ALI_CACHE_FLUSH_ADDR_MASK) |
virt_to_phys(addr)) |
ALI_CACHE_FLUSH_EN));
}
agp_generic_destroy_page(addr);
}
/* Setup function */
static struct gatt_mask ali_generic_masks[] =
{
{mask: 0x00000000, type: 0}
};
static struct aper_size_info_32 ali_generic_sizes[7] =
{
{256, 65536, 6, 10},
{128, 32768, 5, 9},
{64, 16384, 4, 8},
{32, 8192, 3, 7},
{16, 4096, 2, 6},
{8, 2048, 1, 4},
{4, 1024, 0, 3}
};
int __init ali_generic_setup (struct pci_dev *pdev)
{
agp_bridge.masks = ali_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) ali_generic_sizes;
agp_bridge.size_type = U32_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.configure = ali_configure;
agp_bridge.fetch_size = ali_fetch_size;
agp_bridge.cleanup = ali_cleanup;
agp_bridge.tlb_flush = ali_tlbflush;
agp_bridge.mask_memory = ali_mask_memory;
agp_bridge.agp_enable = agp_generic_agp_enable;
agp_bridge.cache_flush = ali_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = ali_alloc_page;
agp_bridge.agp_destroy_page = ali_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
return 0;
(void) pdev; /* unused */
}
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/*
* AGPGART module version 0.99
* Copyright (C) 1999 Jeff Hartmann
* Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* TODO:
* - Allocate more than order 0 pages to avoid too much linear map splitting.
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
static int sis_fetch_size(void)
{
u8 temp_size;
int i;
struct aper_size_info_8 *values;
pci_read_config_byte(agp_bridge.dev, SIS_APSIZE, &temp_size);
values = A_SIZE_8(agp_bridge.aperture_sizes);
for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
if ((temp_size == values[i].size_value) ||
((temp_size & ~(0x03)) ==
(values[i].size_value & ~(0x03)))) {
agp_bridge.previous_size =
agp_bridge.current_size = (void *) (values + i);
agp_bridge.aperture_size_idx = i;
return values[i].size;
}
}
return 0;
}
static void sis_tlbflush(agp_memory * mem)
{
pci_write_config_byte(agp_bridge.dev, SIS_TLBFLUSH, 0x02);
}
static int sis_configure(void)
{
u32 temp;
struct aper_size_info_8 *current_size;
current_size = A_SIZE_8(agp_bridge.current_size);
pci_write_config_byte(agp_bridge.dev, SIS_TLBCNTRL, 0x05);
pci_read_config_dword(agp_bridge.dev, SIS_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
pci_write_config_dword(agp_bridge.dev, SIS_ATTBASE,
agp_bridge.gatt_bus_addr);
pci_write_config_byte(agp_bridge.dev, SIS_APSIZE,
current_size->size_value);
return 0;
}
static void sis_cleanup(void)
{
struct aper_size_info_8 *previous_size;
previous_size = A_SIZE_8(agp_bridge.previous_size);
pci_write_config_byte(agp_bridge.dev, SIS_APSIZE,
(previous_size->size_value & ~(0x03)));
}
static unsigned long sis_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge.masks[0].mask;
}
static struct aper_size_info_8 sis_generic_sizes[7] =
{
{256, 65536, 6, 99},
{128, 32768, 5, 83},
{64, 16384, 4, 67},
{32, 8192, 3, 51},
{16, 4096, 2, 35},
{8, 2048, 1, 19},
{4, 1024, 0, 3}
};
static struct gatt_mask sis_generic_masks[] =
{
{mask: 0x00000000, type: 0}
};
int __init sis_generic_setup (struct pci_dev *pdev)
{
agp_bridge.masks = sis_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) sis_generic_sizes;
agp_bridge.size_type = U8_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.configure = sis_configure;
agp_bridge.fetch_size = sis_fetch_size;
agp_bridge.cleanup = sis_cleanup;
agp_bridge.tlb_flush = sis_tlbflush;
agp_bridge.mask_memory = sis_mask_memory;
agp_bridge.agp_enable = agp_generic_agp_enable;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = agp_generic_alloc_page;
agp_bridge.agp_destroy_page = agp_generic_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
return 0;
}
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/*
* AGPGART module version 0.99
* Copyright (C) 1999 Jeff Hartmann
* Copyright (C) 1999 Precision Insight, Inc.
* Copyright (C) 1999 Xi Graphics, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
* OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* TODO:
* - Allocate more than order 0 pages to avoid too much linear map splitting.
*/
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
static int via_fetch_size(void)
{
int i;
u8 temp;
struct aper_size_info_8 *values;
values = A_SIZE_8(agp_bridge.aperture_sizes);
pci_read_config_byte(agp_bridge.dev, VIA_APSIZE, &temp);
for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
if (temp == values[i].size_value) {
agp_bridge.previous_size =
agp_bridge.current_size = (void *) (values + i);
agp_bridge.aperture_size_idx = i;
return values[i].size;
}
}
return 0;
}
static int via_configure(void)
{
u32 temp;
struct aper_size_info_8 *current_size;
current_size = A_SIZE_8(agp_bridge.current_size);
/* aperture size */
pci_write_config_byte(agp_bridge.dev, VIA_APSIZE,
current_size->size_value);
/* address to map too */
pci_read_config_dword(agp_bridge.dev, VIA_APBASE, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* GART control register */
pci_write_config_dword(agp_bridge.dev, VIA_GARTCTRL, 0x0000000f);
/* attbase - aperture GATT base */
pci_write_config_dword(agp_bridge.dev, VIA_ATTBASE,
(agp_bridge.gatt_bus_addr & 0xfffff000) | 3);
return 0;
}
static void via_cleanup(void)
{
struct aper_size_info_8 *previous_size;
previous_size = A_SIZE_8(agp_bridge.previous_size);
pci_write_config_byte(agp_bridge.dev, VIA_APSIZE,
previous_size->size_value);
/* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
* during reinitialization.
*/
}
static void via_tlbflush(agp_memory * mem)
{
pci_write_config_dword(agp_bridge.dev, VIA_GARTCTRL, 0x0000008f);
pci_write_config_dword(agp_bridge.dev, VIA_GARTCTRL, 0x0000000f);
}
static unsigned long via_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge.masks[0].mask;
}
static struct aper_size_info_8 via_generic_sizes[7] =
{
{256, 65536, 6, 0},
{128, 32768, 5, 128},
{64, 16384, 4, 192},
{32, 8192, 3, 224},
{16, 4096, 2, 240},
{8, 2048, 1, 248},
{4, 1024, 0, 252}
};
static struct gatt_mask via_generic_masks[] =
{
{mask: 0x00000000, type: 0}
};
int __init via_generic_setup (struct pci_dev *pdev)
{
agp_bridge.masks = via_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) via_generic_sizes;
agp_bridge.size_type = U8_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.configure = via_configure;
agp_bridge.fetch_size = via_fetch_size;
agp_bridge.cleanup = via_cleanup;
agp_bridge.tlb_flush = via_tlbflush;
agp_bridge.mask_memory = via_mask_memory;
agp_bridge.agp_enable = agp_generic_agp_enable;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = agp_generic_alloc_page;
agp_bridge.agp_destroy_page = agp_generic_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
return 0;
(void) pdev; /* unused */
}
This diff is collapsed.
...@@ -24,29 +24,16 @@ ...@@ -24,29 +24,16 @@
* *
*/ */
#define __NO_VERSION__
#include <linux/version.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/sched.h> #include <linux/mman.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/pagemap.h>
#include <linux/miscdevice.h> #include <linux/miscdevice.h>
#include <linux/agp_backend.h> #include <linux/agp_backend.h>
#include <linux/agpgart.h> #include <linux/agpgart.h>
#include <linux/smp_lock.h>
#include <asm/system.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/mman.h>
#include "agp.h" #include "agp.h"
......
...@@ -81,13 +81,13 @@ enum chipset_type { ...@@ -81,13 +81,13 @@ enum chipset_type {
HP_ZX1, HP_ZX1,
}; };
typedef struct _agp_version { struct agp_version {
u16 major; u16 major;
u16 minor; u16 minor;
} agp_version; };
typedef struct _agp_kern_info { typedef struct _agp_kern_info {
agp_version version; struct agp_version version;
struct pci_dev *device; struct pci_dev *device;
enum chipset_type chipset; enum chipset_type chipset;
unsigned long mode; unsigned long mode;
......
...@@ -53,13 +53,13 @@ ...@@ -53,13 +53,13 @@
#include <linux/types.h> #include <linux/types.h>
#include <asm/types.h> #include <asm/types.h>
typedef struct _agp_version { struct agp_version {
__u16 major; __u16 major;
__u16 minor; __u16 minor;
} agp_version; };
typedef struct _agp_info { typedef struct _agp_info {
agp_version version; /* version of the driver */ struct agp_version version; /* version of the driver */
__u32 bridge_id; /* bridge vendor/device */ __u32 bridge_id; /* bridge vendor/device */
__u32 agp_mode; /* mode info of bridge */ __u32 agp_mode; /* mode info of bridge */
off_t aper_base; /* base of aperture */ off_t aper_base; /* base of aperture */
...@@ -117,7 +117,7 @@ typedef struct _agp_unbind { ...@@ -117,7 +117,7 @@ typedef struct _agp_unbind {
#define AGP_LOCK_INIT() sema_init(&(agp_fe.agp_mutex), 1) #define AGP_LOCK_INIT() sema_init(&(agp_fe.agp_mutex), 1)
#ifndef _AGP_BACKEND_H #ifndef _AGP_BACKEND_H
typedef struct _agp_version { struct _agp_version {
u16 major; u16 major;
u16 minor; u16 minor;
} agp_version; } agp_version;
...@@ -125,7 +125,7 @@ typedef struct _agp_version { ...@@ -125,7 +125,7 @@ typedef struct _agp_version {
#endif #endif
typedef struct _agp_info { typedef struct _agp_info {
agp_version version; /* version of the driver */ struct agp_version version; /* version of the driver */
u32 bridge_id; /* bridge vendor/device */ u32 bridge_id; /* bridge vendor/device */
u32 agp_mode; /* mode info of bridge */ u32 agp_mode; /* mode info of bridge */
off_t aper_base; /* base of aperture */ off_t aper_base; /* base of aperture */
......
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