Commit b335f289 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: apply new pmfw loading sequence to arcturus and onwards

Arcturus and onwards products should follow the same sequence
that have pmfw loading ahead of tmr setup
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarKevin Wang <kevin1.wang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6d905921
...@@ -57,7 +57,7 @@ static int psp_load_smu_fw(struct psp_context *psp); ...@@ -57,7 +57,7 @@ static int psp_load_smu_fw(struct psp_context *psp);
* - Load XGMI/RAS/HDCP/DTM TA if any * - Load XGMI/RAS/HDCP/DTM TA if any
* *
* This new sequence is required for * This new sequence is required for
* - Arcturus * - Arcturus and onwards
* - Navi12 and onwards * - Navi12 and onwards
*/ */
static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp) static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp)
...@@ -72,8 +72,7 @@ static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp ...@@ -72,8 +72,7 @@ static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp
if (adev->flags & AMD_IS_APU) if (adev->flags & AMD_IS_APU)
return; return;
if ((adev->asic_type == CHIP_ARCTURUS) || if ((adev->asic_type >= CHIP_ARCTURUS) ||
(adev->asic_type == CHIP_ALDEBARAN) ||
(adev->asic_type >= CHIP_NAVI12)) (adev->asic_type >= CHIP_NAVI12))
psp->pmfw_centralized_cstate_management = true; psp->pmfw_centralized_cstate_management = true;
} }
......
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