Commit b3c7a497 authored by Ludovic Desroches's avatar Ludovic Desroches Committed by Nicolas Ferre

ARM: at91/dt: sama5d4: add DMA support

Add DMA controllers and device configurations.
Signed-off-by: default avatarLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 84f017a7
...@@ -45,6 +45,7 @@ ...@@ -45,6 +45,7 @@
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/clock/at91.h> #include <dt-bindings/clock/at91.h>
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -302,6 +303,15 @@ apb { ...@@ -302,6 +303,15 @@ apb {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
dma1: dma-controller@f0004000 {
compatible = "atmel,sama5d4-dma";
reg = <0xf0004000 0x200>;
interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma1_clk>;
clock-names = "dma_clk";
};
ramc0: ramc@f0010000 { ramc0: ramc@f0010000 {
compatible = "atmel,sama5d3-ddramc"; compatible = "atmel,sama5d3-ddramc";
reg = <0xf0010000 0x200>; reg = <0xf0010000 0x200>;
...@@ -309,6 +319,15 @@ ramc0: ramc@f0010000 { ...@@ -309,6 +319,15 @@ ramc0: ramc@f0010000 {
clock-names = "ddrck", "mpddr"; clock-names = "ddrck", "mpddr";
}; };
dma0: dma-controller@f0014000 {
compatible = "atmel,sama5d4-dma";
reg = <0xf0014000 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <1>;
clocks = <&dma0_clk>;
clock-names = "dma_clk";
};
pmc: pmc@f0018000 { pmc: pmc@f0018000 {
compatible = "atmel,sama5d3-pmc"; compatible = "atmel,sama5d3-pmc";
reg = <0xf0018000 0x120>; reg = <0xf0018000 0x120>;
...@@ -761,6 +780,10 @@ mmc0: mmc@f8000000 { ...@@ -761,6 +780,10 @@ mmc0: mmc@f8000000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xf8000000 0x600>; reg = <0xf8000000 0x600>;
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(0))>;
dma-names = "rxtx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
status = "disabled"; status = "disabled";
...@@ -776,6 +799,13 @@ spi0: spi@f8010000 { ...@@ -776,6 +799,13 @@ spi0: spi@f8010000 {
compatible = "atmel,at91rm9200-spi"; compatible = "atmel,at91rm9200-spi";
reg = <0xf8010000 0x100>; reg = <0xf8010000 0x100>;
interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>; interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(10))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(11))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&spi0_clk>; clocks = <&spi0_clk>;
...@@ -787,6 +817,13 @@ i2c0: i2c@f8014000 { ...@@ -787,6 +817,13 @@ i2c0: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x4000>; reg = <0xf8014000 0x4000>;
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(2))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(3))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
#address-cells = <1>; #address-cells = <1>;
...@@ -818,6 +855,13 @@ i2c2: i2c@f8024000 { ...@@ -818,6 +855,13 @@ i2c2: i2c@f8024000 {
compatible = "atmel,at91sam9x5-i2c"; compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8024000 0x4000>; reg = <0xf8024000 0x4000>;
interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>; interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(6))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(7))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
#address-cells = <1>; #address-cells = <1>;
...@@ -830,6 +874,10 @@ mmc1: mmc@fc000000 { ...@@ -830,6 +874,10 @@ mmc1: mmc@fc000000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xfc000000 0x600>; reg = <0xfc000000 0x600>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(1))>;
dma-names = "rxtx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
status = "disabled"; status = "disabled";
...@@ -843,6 +891,13 @@ usart2: serial@fc008000 { ...@@ -843,6 +891,13 @@ usart2: serial@fc008000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xfc008000 0x100>; reg = <0xfc008000 0x100>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(16))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(17))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>; pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
clocks = <&usart2_clk>; clocks = <&usart2_clk>;
...@@ -854,6 +909,13 @@ usart3: serial@fc00c000 { ...@@ -854,6 +909,13 @@ usart3: serial@fc00c000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xfc00c000 0x100>; reg = <0xfc00c000 0x100>;
interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(18))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(19))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>; pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>; clocks = <&usart3_clk>;
...@@ -865,6 +927,13 @@ usart4: serial@fc010000 { ...@@ -865,6 +927,13 @@ usart4: serial@fc010000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xfc010000 0x100>; reg = <0xfc010000 0x100>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(20))>,
<&dma1
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
| AT91_XDMAC_DT_PERID(21))>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart4>; pinctrl-0 = <&pinctrl_usart4>;
clocks = <&usart4_clk>; clocks = <&usart4_clk>;
......
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