Commit b416f192 authored by Boris Brezillon's avatar Boris Brezillon Committed by Gregory CLEMENT

ARM: mvebu: define crypto SRAM ranges for all armada-370 boards

Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 2dbcdb11
...@@ -74,7 +74,8 @@ memory { ...@@ -74,7 +74,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
internal-regs { internal-regs {
serial@12000 { serial@12000 {
......
...@@ -69,7 +69,8 @@ memory { ...@@ -69,7 +69,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -61,7 +61,8 @@ memory { ...@@ -61,7 +61,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
...@@ -138,6 +139,10 @@ ethernet@74000 { ...@@ -138,6 +139,10 @@ ethernet@74000 {
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
}; };
crypto@90000 {
status = "okay";
};
mvsdio@d4000 { mvsdio@d4000 {
pinctrl-0 = <&sdio_pins3>; pinctrl-0 = <&sdio_pins3>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -63,7 +63,8 @@ memory { ...@@ -63,7 +63,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -63,7 +63,8 @@ memory { ...@@ -63,7 +63,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -74,7 +74,8 @@ memory { ...@@ -74,7 +74,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -77,7 +77,8 @@ memory { ...@@ -77,7 +77,8 @@ memory {
soc { soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
internal-regs { internal-regs {
......
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