Commit b4234aec authored by Lee Jones's avatar Lee Jones Committed by Alex Deucher

drm/amd/amdgpu/sdma_v5_0: Provide some missing and repair other function params

Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:403: warning: Function parameter or member 'job' not described in 'sdma_v5_0_ring_emit_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:403: warning: Function parameter or member 'flags' not described in 'sdma_v5_0_ring_emit_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:480: warning: Function parameter or member 'addr' not described in 'sdma_v5_0_ring_emit_fence'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:480: warning: Function parameter or member 'seq' not described in 'sdma_v5_0_ring_emit_fence'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:480: warning: Function parameter or member 'flags' not described in 'sdma_v5_0_ring_emit_fence'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:480: warning: Excess function parameter 'fence' description in 'sdma_v5_0_ring_emit_fence'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:967: warning: Function parameter or member 'timeout' not described in 'sdma_v5_0_ring_test_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1074: warning: Function parameter or member 'value' not described in 'sdma_v5_0_vm_write_pte'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1074: warning: Excess function parameter 'addr' description in 'sdma_v5_0_vm_write_pte'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1074: warning: Excess function parameter 'flags' description in 'sdma_v5_0_vm_write_pte'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1126: warning: Function parameter or member 'ring' not described in 'sdma_v5_0_ring_pad_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1180: warning: Function parameter or member 'vmid' not described in 'sdma_v5_0_ring_emit_vm_flush'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1180: warning: Function parameter or member 'pd_addr' not described in 'sdma_v5_0_ring_emit_vm_flush'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1180: warning: Excess function parameter 'vm' description in 'sdma_v5_0_ring_emit_vm_flush'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1703: warning: Function parameter or member 'ib' not described in 'sdma_v5_0_emit_copy_buffer'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1703: warning: Function parameter or member 'tmz' not described in 'sdma_v5_0_emit_copy_buffer'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1703: warning: Excess function parameter 'ring' description in 'sdma_v5_0_emit_copy_buffer'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1729: warning: Function parameter or member 'ib' not described in 'sdma_v5_0_emit_fill_buffer'
 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c:1729: warning: Excess function parameter 'ring' description in 'sdma_v5_0_emit_fill_buffer'

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6c93cc2c
...@@ -392,7 +392,9 @@ static void sdma_v5_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) ...@@ -392,7 +392,9 @@ static void sdma_v5_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
* sdma_v5_0_ring_emit_ib - Schedule an IB on the DMA engine * sdma_v5_0_ring_emit_ib - Schedule an IB on the DMA engine
* *
* @ring: amdgpu ring pointer * @ring: amdgpu ring pointer
* @job: job to retrieve vmid from
* @ib: IB object to schedule * @ib: IB object to schedule
* @flags: unused
* *
* Schedule an IB in the DMA ring (NAVI10). * Schedule an IB in the DMA ring (NAVI10).
*/ */
...@@ -469,7 +471,9 @@ static void sdma_v5_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) ...@@ -469,7 +471,9 @@ static void sdma_v5_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
* sdma_v5_0_ring_emit_fence - emit a fence on the DMA ring * sdma_v5_0_ring_emit_fence - emit a fence on the DMA ring
* *
* @ring: amdgpu ring pointer * @ring: amdgpu ring pointer
* @fence: amdgpu fence object * @addr: address
* @seq: sequence number
* @flags: fence related flags
* *
* Add a DMA fence packet to the ring to write * Add a DMA fence packet to the ring to write
* the fence seq number and DMA trap packet to generate * the fence seq number and DMA trap packet to generate
...@@ -959,6 +963,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring) ...@@ -959,6 +963,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)
* sdma_v5_0_ring_test_ib - test an IB on the DMA engine * sdma_v5_0_ring_test_ib - test an IB on the DMA engine
* *
* @ring: amdgpu_ring structure holding ring information * @ring: amdgpu_ring structure holding ring information
* @timeout: timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
* *
* Test a simple IB in the DMA ring (NAVI10). * Test a simple IB in the DMA ring (NAVI10).
* Returns 0 on success, error on failure. * Returns 0 on success, error on failure.
...@@ -1061,10 +1066,9 @@ static void sdma_v5_0_vm_copy_pte(struct amdgpu_ib *ib, ...@@ -1061,10 +1066,9 @@ static void sdma_v5_0_vm_copy_pte(struct amdgpu_ib *ib,
* *
* @ib: indirect buffer to fill with commands * @ib: indirect buffer to fill with commands
* @pe: addr of the page entry * @pe: addr of the page entry
* @addr: dst addr to write into pe * @value: dst addr to write into pe
* @count: number of page entries to update * @count: number of page entries to update
* @incr: increase next addr by incr bytes * @incr: increase next addr by incr bytes
* @flags: access flags
* *
* Update PTEs by writing them manually using sDMA (NAVI10). * Update PTEs by writing them manually using sDMA (NAVI10).
*/ */
...@@ -1118,6 +1122,7 @@ static void sdma_v5_0_vm_set_pte_pde(struct amdgpu_ib *ib, ...@@ -1118,6 +1122,7 @@ static void sdma_v5_0_vm_set_pte_pde(struct amdgpu_ib *ib,
/** /**
* sdma_v5_0_ring_pad_ib - pad the IB * sdma_v5_0_ring_pad_ib - pad the IB
* @ring: amdgpu_ring structure holding ring information
* @ib: indirect buffer to fill with padding * @ib: indirect buffer to fill with padding
* *
* Pad the IB with NOPs to a boundary multiple of 8. * Pad the IB with NOPs to a boundary multiple of 8.
...@@ -1170,7 +1175,8 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) ...@@ -1170,7 +1175,8 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
* sdma_v5_0_ring_emit_vm_flush - vm flush using sDMA * sdma_v5_0_ring_emit_vm_flush - vm flush using sDMA
* *
* @ring: amdgpu_ring pointer * @ring: amdgpu_ring pointer
* @vm: amdgpu_vm pointer * @vmid: vmid number to use
* @pd_addr: address
* *
* Update the page table base and flush the VM TLB * Update the page table base and flush the VM TLB
* using sDMA (NAVI10). * using sDMA (NAVI10).
...@@ -1686,10 +1692,11 @@ static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev) ...@@ -1686,10 +1692,11 @@ static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev)
/** /**
* sdma_v5_0_emit_copy_buffer - copy buffer using the sDMA engine * sdma_v5_0_emit_copy_buffer - copy buffer using the sDMA engine
* *
* @ring: amdgpu_ring structure holding ring information * @ib: indirect buffer to copy to
* @src_offset: src GPU address * @src_offset: src GPU address
* @dst_offset: dst GPU address * @dst_offset: dst GPU address
* @byte_count: number of bytes to xfer * @byte_count: number of bytes to xfer
* @tmz: if a secure copy should be used
* *
* Copy GPU buffers using the DMA engine (NAVI10). * Copy GPU buffers using the DMA engine (NAVI10).
* Used by the amdgpu ttm implementation to move pages if * Used by the amdgpu ttm implementation to move pages if
...@@ -1715,7 +1722,7 @@ static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib, ...@@ -1715,7 +1722,7 @@ static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib,
/** /**
* sdma_v5_0_emit_fill_buffer - fill buffer using the sDMA engine * sdma_v5_0_emit_fill_buffer - fill buffer using the sDMA engine
* *
* @ring: amdgpu_ring structure holding ring information * @ib: indirect buffer to fill
* @src_data: value to write to buffer * @src_data: value to write to buffer
* @dst_offset: dst GPU address * @dst_offset: dst GPU address
* @byte_count: number of bytes to xfer * @byte_count: number of bytes to xfer
......
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