Commit b4b7b772 authored by jpinto's avatar jpinto Committed by David S. Miller

stmmac: adding DT parameter for LPI tx clock gating

This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating.
It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock
gating is needed by stmmac users also.
Signed-off-by: default avatarJoao Pinto <jpinto@synopsys.com>
Tested-by: default avatarNiklas Cassel <niklas.cassel@axis.com>
Reviewed-by: default avatarLars Persson <larper@axis.com>
Acked-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3a7f75e5
...@@ -49,6 +49,8 @@ Optional properties: ...@@ -49,6 +49,8 @@ Optional properties:
- snps,force_sf_dma_mode Force DMA to use the Store and Forward - snps,force_sf_dma_mode Force DMA to use the Store and Forward
mode for both tx and rx. This flag is mode for both tx and rx. This flag is
ignored if force_thresh_dma_mode is set. ignored if force_thresh_dma_mode is set.
- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
TX low-power mode
- snps,multicast-filter-bins: Number of multicast filter hash bins - snps,multicast-filter-bins: Number of multicast filter hash bins
supported by this device instance supported by this device instance
- snps,perfect-filter-entries: Number of perfect filter entries supported - snps,perfect-filter-entries: Number of perfect filter entries supported
......
...@@ -476,7 +476,8 @@ struct stmmac_ops { ...@@ -476,7 +476,8 @@ struct stmmac_ops {
unsigned int reg_n); unsigned int reg_n);
void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr, void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
unsigned int reg_n); unsigned int reg_n);
void (*set_eee_mode)(struct mac_device_info *hw); void (*set_eee_mode)(struct mac_device_info *hw,
bool en_tx_lpi_clockgating);
void (*reset_eee_mode)(struct mac_device_info *hw); void (*reset_eee_mode)(struct mac_device_info *hw);
void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw); void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
void (*set_eee_pls)(struct mac_device_info *hw, int link); void (*set_eee_pls)(struct mac_device_info *hw, int link);
......
...@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw, ...@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
return ret; return ret;
} }
static void dwmac1000_set_eee_mode(struct mac_device_info *hw) static void dwmac1000_set_eee_mode(struct mac_device_info *hw,
bool en_tx_lpi_clockgating)
{ {
void __iomem *ioaddr = hw->pcsr; void __iomem *ioaddr = hw->pcsr;
u32 value; u32 value;
/*TODO - en_tx_lpi_clockgating treatment */
/* Enable the link status receive on RGMII, SGMII ore SMII /* Enable the link status receive on RGMII, SGMII ore SMII
* receive path and instruct the transmit to enter in LPI * receive path and instruct the transmit to enter in LPI
* state. * state.
......
...@@ -98,6 +98,7 @@ enum power_event { ...@@ -98,6 +98,7 @@ enum power_event {
#define GMAC4_LPI_TIMER_CTRL 0xd4 #define GMAC4_LPI_TIMER_CTRL 0xd4
/* LPI control and status defines */ /* LPI control and status defines */
#define GMAC4_LPI_CTRL_STATUS_LPITCSE BIT(21) /* LPI Tx Clock Stop Enable */
#define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */ #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */
#define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */ #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */
#define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */ #define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */
......
...@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw, ...@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,
GMAC_ADDR_LOW(reg_n)); GMAC_ADDR_LOW(reg_n));
} }
static void dwmac4_set_eee_mode(struct mac_device_info *hw) static void dwmac4_set_eee_mode(struct mac_device_info *hw,
bool en_tx_lpi_clockgating)
{ {
void __iomem *ioaddr = hw->pcsr; void __iomem *ioaddr = hw->pcsr;
u32 value; u32 value;
...@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw) ...@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw)
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS); value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA; value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
if (en_tx_lpi_clockgating)
value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;
writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS); writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
} }
......
...@@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv) ...@@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
/* Check and enter in LPI mode */ /* Check and enter in LPI mode */
if ((priv->dirty_tx == priv->cur_tx) && if ((priv->dirty_tx == priv->cur_tx) &&
(priv->tx_path_in_lpi_mode == false)) (priv->tx_path_in_lpi_mode == false))
priv->hw->mac->set_eee_mode(priv->hw); priv->hw->mac->set_eee_mode(priv->hw,
priv->plat->en_tx_lpi_clockgating);
} }
/** /**
......
...@@ -248,6 +248,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac) ...@@ -248,6 +248,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
plat->force_sf_dma_mode = plat->force_sf_dma_mode =
of_property_read_bool(np, "snps,force_sf_dma_mode"); of_property_read_bool(np, "snps,force_sf_dma_mode");
plat->en_tx_lpi_clockgating =
of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
/* Set the maxmtu to a default of JUMBO_LEN in case the /* Set the maxmtu to a default of JUMBO_LEN in case the
* parameter is not present in the device tree. * parameter is not present in the device tree.
*/ */
......
...@@ -142,5 +142,6 @@ struct plat_stmmacenet_data { ...@@ -142,5 +142,6 @@ struct plat_stmmacenet_data {
int has_gmac4; int has_gmac4;
bool tso_en; bool tso_en;
int mac_port_sel_speed; int mac_port_sel_speed;
bool en_tx_lpi_clockgating;
}; };
#endif #endif
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