Commit b4d99def authored by hayeswang's avatar hayeswang Committed by David S. Miller

r8152: remove sram_read

Read OCP register 0xa43a~0xa43b would clear some flags which the hw
would use, and it may let the device lost. However, the unit of
reading is 4 bytes. That is, it would read 0xa438~0xa43b when calling
sram_read() to read OCP_SRAM_DATA.
Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8cb3db24
...@@ -920,12 +920,6 @@ static void sram_write(struct r8152 *tp, u16 addr, u16 data) ...@@ -920,12 +920,6 @@ static void sram_write(struct r8152 *tp, u16 addr, u16 data)
ocp_reg_write(tp, OCP_SRAM_DATA, data); ocp_reg_write(tp, OCP_SRAM_DATA, data);
} }
static u16 sram_read(struct r8152 *tp, u16 addr)
{
ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
return ocp_reg_read(tp, OCP_SRAM_DATA);
}
static int read_mii_word(struct net_device *netdev, int phy_id, int reg) static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
{ {
struct r8152 *tp = netdev_priv(netdev); struct r8152 *tp = netdev_priv(netdev);
...@@ -2512,24 +2506,18 @@ static void r8153_hw_phy_cfg(struct r8152 *tp) ...@@ -2512,24 +2506,18 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
data = ocp_reg_read(tp, OCP_POWER_CFG); data = ocp_reg_read(tp, OCP_POWER_CFG);
data |= EN_10M_PLLOFF; data |= EN_10M_PLLOFF;
ocp_reg_write(tp, OCP_POWER_CFG, data); ocp_reg_write(tp, OCP_POWER_CFG, data);
data = sram_read(tp, SRAM_IMPEDANCE); sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
data &= ~RX_DRIVING_MASK;
sram_write(tp, SRAM_IMPEDANCE, data);
ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
ocp_data |= PFM_PWM_SWITCH; ocp_data |= PFM_PWM_SWITCH;
ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
data = sram_read(tp, SRAM_LPF_CFG); /* Enable LPF corner auto tune */
data |= LPF_AUTO_TUNE; sram_write(tp, SRAM_LPF_CFG, 0xf70f);
sram_write(tp, SRAM_LPF_CFG, data);
data = sram_read(tp, SRAM_10M_AMP1); /* Adjust 10M Amplitude */
data |= GDAC_IB_UPALL; sram_write(tp, SRAM_10M_AMP1, 0x00af);
sram_write(tp, SRAM_10M_AMP1, data); sram_write(tp, SRAM_10M_AMP2, 0x0208);
data = sram_read(tp, SRAM_10M_AMP2);
data |= AMP_DN;
sram_write(tp, SRAM_10M_AMP2, data);
set_bit(PHY_RESET, &tp->flags); set_bit(PHY_RESET, &tp->flags);
} }
......
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