video: s3c-fb: Add support EXYNOS4 FIMD
This patch adds struct s3c_fb_driverdata s3c_fb_data_exynos4 for EXYNOS4 and adds lcd clock gating support. FIMD driver needs two clocks for FIMD IP and LCD pixel clock. Previously, both clocks are provided by using bus clock such as HCLK. However, EXYNOS4 can not select HCLK for LCD pixel clock because the EXYNOS4 FIMD IP does not have the CLKSEL bit of VIDCON0. So, FIMD driver should provide the lcd clock using SCLK_FIMD as LCD pixel clock for EXYNOS4. The driver selects enabling lcd clock according to has_clksel which means the CLKSEL bit of VIDCON0. If there is has_clksel, the driver will not enable the lcd clock using SCLK_FIMD because bus clock using HCLK is used a LCD pixel clock. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
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