Commit b5d1c572 authored by William wu's avatar William wu Committed by Heiko Stuebner

arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399

We found that the suspend process was blocked when it run into
ehci/ohci module due to clk-480m of usb2-phy was disabled.

The root cause is that usb2-phy suspended earlier than ehci/ohci
(usb2-phy will be auto suspended if no devices plug-in). and the
clk-480m provided by it was disabled if no module used. However,
some suspend process related ehci/ohci are base on this clock,
so we should refer it into ehci/ohci driver to prevent this case.

The u2phy clock flow like this:
===
      u2phy ________________
           |                |    |-----> UTMI_CLK ---------> | EHCI |
OSC_24M ---|---> PHY_PLL----|----|
           |________^_______|    |-----> 480M_CLK ---|G|---> | USBPHY_480M_SRC| ----> USBPHY_480M for SoC
                    |
                    |
                   GRF
===
Signed-off-by: default avatarWilliam wu <wulf@rock-chips.com>
Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 8742466a
...@@ -321,8 +321,10 @@ usb_host0_ehci: usb@fe380000 { ...@@ -321,8 +321,10 @@ usb_host0_ehci: usb@fe380000 {
compatible = "generic-ehci"; compatible = "generic-ehci";
reg = <0x0 0xfe380000 0x0 0x20000>; reg = <0x0 0xfe380000 0x0 0x20000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>; clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
clock-names = "hclk_host0", "hclk_host0_arb"; <&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>; phys = <&u2phy0_host>;
phy-names = "usb"; phy-names = "usb";
status = "disabled"; status = "disabled";
...@@ -332,8 +334,12 @@ usb_host0_ohci: usb@fe3a0000 { ...@@ -332,8 +334,12 @@ usb_host0_ohci: usb@fe3a0000 {
compatible = "generic-ohci"; compatible = "generic-ohci";
reg = <0x0 0xfe3a0000 0x0 0x20000>; reg = <0x0 0xfe3a0000 0x0 0x20000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>; clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
clock-names = "hclk_host0", "hclk_host0_arb"; <&u2phy0>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy0_host>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
...@@ -341,8 +347,10 @@ usb_host1_ehci: usb@fe3c0000 { ...@@ -341,8 +347,10 @@ usb_host1_ehci: usb@fe3c0000 {
compatible = "generic-ehci"; compatible = "generic-ehci";
reg = <0x0 0xfe3c0000 0x0 0x20000>; reg = <0x0 0xfe3c0000 0x0 0x20000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>; clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
clock-names = "hclk_host1", "hclk_host1_arb"; <&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>; phys = <&u2phy1_host>;
phy-names = "usb"; phy-names = "usb";
status = "disabled"; status = "disabled";
...@@ -352,8 +360,12 @@ usb_host1_ohci: usb@fe3e0000 { ...@@ -352,8 +360,12 @@ usb_host1_ohci: usb@fe3e0000 {
compatible = "generic-ohci"; compatible = "generic-ohci";
reg = <0x0 0xfe3e0000 0x0 0x20000>; reg = <0x0 0xfe3e0000 0x0 0x20000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>; clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
clock-names = "hclk_host1", "hclk_host1_arb"; <&u2phy1>;
clock-names = "usbhost", "arbiter",
"utmi";
phys = <&u2phy1_host>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
......
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