Commit b6e281b7 authored by Eugene Surovegin's avatar Eugene Surovegin Committed by Linus Torvalds

[PATCH] ppc32: Lindentify PPC4xx PIC driver

This patch fixes whitespace in PPC4xx PIC driver.
Signed-off-by: default avatarEugene Surovegin <ebs@ebshome.net>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 021baacb
......@@ -29,8 +29,9 @@
/* See comment in include/arch-ppc/ppc4xx_pic.h
* for more info about these two variables
*/
extern struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[NR_UICS] __attribute__((weak));
extern unsigned char ppc4xx_uic_ext_irq_cfg[] __attribute__((weak));
extern struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[NR_UICS]
__attribute__ ((weak));
extern unsigned char ppc4xx_uic_ext_irq_cfg[] __attribute__ ((weak));
#define IRQ_MASK_UIC0(irq) (1 << (31 - (irq)))
#define IRQ_MASK_UICx(irq) (1 << (31 - ((irq) & 0x1f)))
......@@ -63,11 +64,11 @@ static void ppc4xx_uic##n##_end(unsigned int irq) \
{ \
unsigned int status = irq_desc[irq].status; \
u32 mask = IRQ_MASK_UIC##n(irq); \
if (status & IRQ_LEVEL){ \
if (status & IRQ_LEVEL) { \
mtdcr(DCRN_UIC_SR(UIC##n), mask); \
ACK_UIC##n##_PARENT \
} \
if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))){ \
if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) { \
ppc_cached_irq_mask[n] |= mask; \
mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
} \
......@@ -86,7 +87,9 @@ static void ppc4xx_uic##n##_end(unsigned int irq) \
#define ACK_UIC0_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC0NC);
#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC1NC);
#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC2NC);
UIC_HANDLERS(0); UIC_HANDLERS(1); UIC_HANDLERS(2);
UIC_HANDLERS(0);
UIC_HANDLERS(1);
UIC_HANDLERS(2);
static int ppc4xx_pic_get_irq(struct pt_regs *regs)
{
......@@ -114,7 +117,8 @@ static void __init ppc4xx_pic_impl_init(void)
#elif NR_UICS == 2
#define ACK_UIC0_PARENT
#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC);
UIC_HANDLERS(0); UIC_HANDLERS(1);
UIC_HANDLERS(0);
UIC_HANDLERS(1);
static int ppc4xx_pic_get_irq(struct pt_regs *regs)
{
......@@ -143,7 +147,9 @@ static int ppc4xx_pic_get_irq(struct pt_regs *regs)
return uic0 ? 32 - ffs(uic0) : -1;
}
static inline void ppc4xx_pic_impl_init(void){}
static inline void ppc4xx_pic_impl_init(void)
{
}
#endif
static struct ppc4xx_uic_impl {
......@@ -168,9 +174,9 @@ static inline int is_level_sensitive(int irq)
void __init ppc4xx_pic_init(void)
{
int i;
unsigned char* eirqs = ppc4xx_uic_ext_irq_cfg;
unsigned char *eirqs = ppc4xx_uic_ext_irq_cfg;
for (i = 0; i < NR_UICS; ++i){
for (i = 0; i < NR_UICS; ++i) {
int base = __uic[i].base;
/* Disable everything by default */
......@@ -181,8 +187,8 @@ void __init ppc4xx_pic_init(void)
mtdcr(DCRN_UIC_CR(base), 0);
/* Configure polarity and triggering */
if (ppc4xx_core_uic_cfg){
struct ppc4xx_uic_settings* p = ppc4xx_core_uic_cfg + i;
if (ppc4xx_core_uic_cfg) {
struct ppc4xx_uic_settings *p = ppc4xx_core_uic_cfg + i;
u32 mask = p->ext_irq_mask;
u32 pr = mfdcr(DCRN_UIC_PR(base)) & mask;
u32 tr = mfdcr(DCRN_UIC_TR(base)) & mask;
......@@ -194,10 +200,10 @@ void __init ppc4xx_pic_init(void)
/* Merge external IRQs settings if board port
* provided them
*/
if (eirqs && mask){
if (eirqs && mask) {
pr &= ~mask;
tr &= ~mask;
while (mask){
while (mask) {
/* Extract current external IRQ mask */
u32 eirq_mask = 1 << __ilog2(mask);
......@@ -227,7 +233,7 @@ void __init ppc4xx_pic_init(void)
ppc4xx_pic_impl_init();
/* Attach low-level handlers */
for (i = 0; i < (NR_UICS << 5); ++i){
for (i = 0; i < (NR_UICS << 5); ++i) {
irq_desc[i].handler = &__uic[i >> 5].decl;
if (is_level_sensitive(i))
irq_desc[i].status |= IRQ_LEVEL;
......
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