Commit b6fce738 authored by Jan Kiszka's avatar Jan Kiszka Committed by Greg Kroah-Hartman

serial: 8250_pci: Use symbolic constants for EXAR's MPIO registers

Less magic that only requires comments.
Signed-off-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e06690bf
...@@ -1583,6 +1583,19 @@ static int pci_eg20t_init(struct pci_dev *dev) ...@@ -1583,6 +1583,19 @@ static int pci_eg20t_init(struct pci_dev *dev)
#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358 #define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358 #define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
#define UART_EXAR_MPIOINT_7_0 0x8f /* MPIOINT[7:0] */
#define UART_EXAR_MPIOLVL_7_0 0x90 /* MPIOLVL[7:0] */
#define UART_EXAR_MPIO3T_7_0 0x91 /* MPIO3T[7:0] */
#define UART_EXAR_MPIOINV_7_0 0x92 /* MPIOINV[7:0] */
#define UART_EXAR_MPIOSEL_7_0 0x93 /* MPIOSEL[7:0] */
#define UART_EXAR_MPIOOD_7_0 0x94 /* MPIOOD[7:0] */
#define UART_EXAR_MPIOINT_15_8 0x95 /* MPIOINT[15:8] */
#define UART_EXAR_MPIOLVL_15_8 0x96 /* MPIOLVL[15:8] */
#define UART_EXAR_MPIO3T_15_8 0x97 /* MPIO3T[15:8] */
#define UART_EXAR_MPIOINV_15_8 0x98 /* MPIOINV[15:8] */
#define UART_EXAR_MPIOSEL_15_8 0x99 /* MPIOSEL[15:8] */
#define UART_EXAR_MPIOOD_15_8 0x9a /* MPIOOD[15:8] */
static int static int
pci_xr17c154_setup(struct serial_private *priv, pci_xr17c154_setup(struct serial_private *priv,
const struct pciserial_board *board, const struct pciserial_board *board,
...@@ -1625,18 +1638,18 @@ pci_xr17v35x_setup(struct serial_private *priv, ...@@ -1625,18 +1638,18 @@ pci_xr17v35x_setup(struct serial_private *priv,
* Setup Multipurpose Input/Output pins. * Setup Multipurpose Input/Output pins.
*/ */
if (idx == 0) { if (idx == 0) {
writeb(0x00, p + 0x8f); /*MPIOINT[7:0]*/ writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
writeb(0x00, p + 0x90); /*MPIOLVL[7:0]*/ writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
writeb(0x00, p + 0x91); /*MPIO3T[7:0]*/ writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
writeb(0x00, p + 0x92); /*MPIOINV[7:0]*/ writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
writeb(0x00, p + 0x93); /*MPIOSEL[7:0]*/ writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
writeb(0x00, p + 0x94); /*MPIOOD[7:0]*/ writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
writeb(0x00, p + 0x95); /*MPIOINT[15:8]*/ writeb(0x00, p + UART_EXAR_MPIOINT_15_8);
writeb(0x00, p + 0x96); /*MPIOLVL[15:8]*/ writeb(0x00, p + UART_EXAR_MPIOLVL_15_8);
writeb(0x00, p + 0x97); /*MPIO3T[15:8]*/ writeb(0x00, p + UART_EXAR_MPIO3T_15_8);
writeb(0x00, p + 0x98); /*MPIOINV[15:8]*/ writeb(0x00, p + UART_EXAR_MPIOINV_15_8);
writeb(0x00, p + 0x99); /*MPIOSEL[15:8]*/ writeb(0x00, p + UART_EXAR_MPIOSEL_15_8);
writeb(0x00, p + 0x9a); /*MPIOOD[15:8]*/ writeb(0x00, p + UART_EXAR_MPIOOD_15_8);
} }
writeb(0x00, p + UART_EXAR_8XMODE); writeb(0x00, p + UART_EXAR_8XMODE);
writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
...@@ -1672,20 +1685,20 @@ pci_fastcom335_setup(struct serial_private *priv, ...@@ -1672,20 +1685,20 @@ pci_fastcom335_setup(struct serial_private *priv,
switch (priv->dev->device) { switch (priv->dev->device) {
case PCI_DEVICE_ID_COMMTECH_4222PCI335: case PCI_DEVICE_ID_COMMTECH_4222PCI335:
case PCI_DEVICE_ID_COMMTECH_4224PCI335: case PCI_DEVICE_ID_COMMTECH_4224PCI335:
writeb(0x78, p + 0x90); /* MPIOLVL[7:0] */ writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
writeb(0x00, p + 0x92); /* MPIOINV[7:0] */ writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
writeb(0x00, p + 0x93); /* MPIOSEL[7:0] */ writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
break; break;
case PCI_DEVICE_ID_COMMTECH_2324PCI335: case PCI_DEVICE_ID_COMMTECH_2324PCI335:
case PCI_DEVICE_ID_COMMTECH_2328PCI335: case PCI_DEVICE_ID_COMMTECH_2328PCI335:
writeb(0x00, p + 0x90); /* MPIOLVL[7:0] */ writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
writeb(0xc0, p + 0x92); /* MPIOINV[7:0] */ writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
writeb(0xc0, p + 0x93); /* MPIOSEL[7:0] */ writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
break; break;
} }
writeb(0x00, p + 0x8f); /* MPIOINT[7:0] */ writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
writeb(0x00, p + 0x91); /* MPIO3T[7:0] */ writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
writeb(0x00, p + 0x94); /* MPIOOD[7:0] */ writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
} }
writeb(0x00, p + UART_EXAR_8XMODE); writeb(0x00, p + UART_EXAR_8XMODE);
writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR); writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
......
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