Commit b7a8ca51 authored by Jean-Christophe PLAGNIOL-VILLARD's avatar Jean-Christophe PLAGNIOL-VILLARD Committed by Nicolas Ferre

ARM: at91: rm9200 fix time support

since commit 838a2ae8
Author: Shawn Guo <shawn.guo@linaro.org>
Date:   Sat Jan 12 11:50:05 2013 +0000

ARM: use clockevents_config_and_register() where possible

The timer is wrongly configured and result in a nice crash
so revert it on rm9200 timer.
Signed-off-by: default avatarJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: stable <stable@vger.kernel.org> # 3.8+
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 3f811272
...@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) ...@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
static struct clock_event_device clkevt = { static struct clock_event_device clkevt = {
.name = "at91_tick", .name = "at91_tick",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.shift = 32,
.rating = 150, .rating = 150,
.set_next_event = clkevt32k_next_event, .set_next_event = clkevt32k_next_event,
.set_mode = clkevt32k_mode, .set_mode = clkevt32k_mode,
...@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void) ...@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
at91_st_write(AT91_ST_RTMR, 1); at91_st_write(AT91_ST_RTMR, 1);
/* Setup timer clockevent, with minimum of two ticks (important!!) */ /* Setup timer clockevent, with minimum of two ticks (important!!) */
clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
clkevt.cpumask = cpumask_of(0); clkevt.cpumask = cpumask_of(0);
clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, clockevents_register_device(&clkevt);
2, AT91_ST_ALMV);
/* register clocksource */ /* register clocksource */
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
......
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