Commit b7fc2cc5 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle

MIPS: Declare various variables & functions static

We currently have various variables & functions which are only used
within a single translation unit, but which we don't declare static.
This causes various sparse warnings of the form:

  arch/mips/kernel/mips-r2-to-r6-emul.c:49:1: warning: symbol
    'mipsr2emustats' was not declared. Should it be static?

  arch/mips/kernel/unaligned.c:1381:11: warning: symbol 'reg16to32st'
    was not declared. Should it be static?

  arch/mips/mm/mmap.c:146:15: warning: symbol 'arch_mmap_rnd' was not
    declared. Should it be static?

Fix these & others by declaring various affected variables & functions
static, avoiding the sparse warnings & redundant symbols.

[ralf@linux-mips.org: Add Marcin's build fix.]
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: trivial@kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17176/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7d630e83
...@@ -326,7 +326,7 @@ static int __init fpu_disable(char *s) ...@@ -326,7 +326,7 @@ static int __init fpu_disable(char *s)
__setup("nofpu", fpu_disable); __setup("nofpu", fpu_disable);
int mips_dsp_disabled; static int mips_dsp_disabled;
static int __init dsp_disable(char *s) static int __init dsp_disable(char *s)
{ {
......
...@@ -46,9 +46,11 @@ ...@@ -46,9 +46,11 @@
#define LL "ll " #define LL "ll "
#define SC "sc " #define SC "sc "
DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2emustats); #ifdef CONFIG_DEBUG_FS
DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2bdemustats); static DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2emustats);
DEFINE_PER_CPU(struct mips_r2br_emulator_stats, mipsr2bremustats); static DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2bdemustats);
static DEFINE_PER_CPU(struct mips_r2br_emulator_stats, mipsr2bremustats);
#endif
extern const unsigned int fpucondbit[8]; extern const unsigned int fpucondbit[8];
......
...@@ -49,7 +49,7 @@ static DEFINE_PER_CPU_READ_MOSTLY(cps_nc_entry_fn[CPS_PM_STATE_COUNT], ...@@ -49,7 +49,7 @@ static DEFINE_PER_CPU_READ_MOSTLY(cps_nc_entry_fn[CPS_PM_STATE_COUNT],
nc_asm_enter); nc_asm_enter);
/* Bitmap indicating which states are supported by the system */ /* Bitmap indicating which states are supported by the system */
DECLARE_BITMAP(state_support, CPS_PM_STATE_COUNT); static DECLARE_BITMAP(state_support, CPS_PM_STATE_COUNT);
/* /*
* Indicates the number of coupled VPEs ready to operate in a non-coherent * Indicates the number of coupled VPEs ready to operate in a non-coherent
......
...@@ -1378,7 +1378,7 @@ static void emulate_load_store_insn(struct pt_regs *regs, ...@@ -1378,7 +1378,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
const int reg16to32[] = { 16, 17, 2, 3, 4, 5, 6, 7 }; const int reg16to32[] = { 16, 17, 2, 3, 4, 5, 6, 7 };
/* Recode table from 16-bit STORE register notation to 32-bit GPR. */ /* Recode table from 16-bit STORE register notation to 32-bit GPR. */
const int reg16to32st[] = { 0, 17, 2, 3, 4, 5, 6, 7 }; static const int reg16to32st[] = { 0, 17, 2, 3, 4, 5, 6, 7 };
static void emulate_load_store_microMIPS(struct pt_regs *regs, static void emulate_load_store_microMIPS(struct pt_regs *regs,
void __user *addr) void __user *addr)
......
...@@ -373,12 +373,12 @@ static void mips_dma_sync_sg_for_device(struct device *dev, ...@@ -373,12 +373,12 @@ static void mips_dma_sync_sg_for_device(struct device *dev,
} }
} }
int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) static int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{ {
return 0; return 0;
} }
int mips_dma_supported(struct device *dev, u64 mask) static int mips_dma_supported(struct device *dev, u64 mask)
{ {
return plat_dma_supported(dev, mask); return plat_dma_supported(dev, mask);
} }
......
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