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Commit b93a2226 authored by Don Skidmore's avatar Don Skidmore Committed by Jeff Kirsher
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ixgbe: add support for x540 MAC 

This patch adds support for the x540 MAC which is the next MAC in the
82598/82599 line.
Signed-off-by: default avatarDon Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent fe15e8e1
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Showing with 177 additions and 50 deletions
drivers/net/ixgbe/ixgbe.h
View file @ b93a2226
...@@ -544,6 +544,10 @@ extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, ...@@ -544,6 +544,10 @@ extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input,
u16 flex_byte); u16 flex_byte);
extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input,
u8 l4type); u8 l4type);
extern void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
struct ixgbe_ring *ring);
extern void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter,
struct ixgbe_ring *ring);
extern void ixgbe_set_rx_mode(struct net_device *netdev); extern void ixgbe_set_rx_mode(struct net_device *netdev);
#ifdef IXGBE_FCOE #ifdef IXGBE_FCOE
extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
......
drivers/net/ixgbe/ixgbe_dcb.c
View file @ b93a2226
...@@ -152,10 +152,17 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, ...@@ -152,10 +152,17 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw,
struct ixgbe_dcb_config *dcb_config) struct ixgbe_dcb_config *dcb_config)
{ {
s32 ret = 0; s32 ret = 0;
if (hw->mac.type == ixgbe_mac_82598EB) switch (hw->mac.type) {
case ixgbe_mac_82598EB:
ret = ixgbe_dcb_hw_config_82598(hw, dcb_config); ret = ixgbe_dcb_hw_config_82598(hw, dcb_config);
else if (hw->mac.type == ixgbe_mac_82599EB) break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
ret = ixgbe_dcb_hw_config_82599(hw, dcb_config); ret = ixgbe_dcb_hw_config_82599(hw, dcb_config);
break;
default:
break;
}
return ret; return ret;
} }
drivers/net/ixgbe/ixgbe_dcb_nl.c
View file @ b93a2226
...@@ -130,15 +130,21 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) ...@@ -130,15 +130,21 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
netdev->netdev_ops->ndo_stop(netdev); netdev->netdev_ops->ndo_stop(netdev);
ixgbe_clear_interrupt_scheme(adapter); ixgbe_clear_interrupt_scheme(adapter);
if (adapter->hw.mac.type == ixgbe_mac_82598EB) { adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
switch (adapter->hw.mac.type) {
case ixgbe_mac_82598EB:
adapter->last_lfc_mode = adapter->hw.fc.current_mode; adapter->last_lfc_mode = adapter->hw.fc.current_mode;
adapter->hw.fc.requested_mode = ixgbe_fc_none; adapter->hw.fc.requested_mode = ixgbe_fc_none;
} break;
adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; case ixgbe_mac_82599EB:
if (adapter->hw.mac.type == ixgbe_mac_82599EB) { case ixgbe_mac_X540:
adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
break;
default:
break;
} }
adapter->flags |= IXGBE_FLAG_DCB_ENABLED; adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
ixgbe_init_interrupt_scheme(adapter); ixgbe_init_interrupt_scheme(adapter);
if (netif_running(netdev)) if (netif_running(netdev))
...@@ -155,8 +161,14 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) ...@@ -155,8 +161,14 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
adapter->dcb_cfg.pfc_mode_enable = false; adapter->dcb_cfg.pfc_mode_enable = false;
adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
adapter->flags |= IXGBE_FLAG_RSS_ENABLED; adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
if (adapter->hw.mac.type == ixgbe_mac_82599EB) switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
break;
default:
break;
}
ixgbe_init_interrupt_scheme(adapter); ixgbe_init_interrupt_scheme(adapter);
if (netif_running(netdev)) if (netif_running(netdev))
...@@ -178,9 +190,14 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, ...@@ -178,9 +190,14 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
for (i = 0; i < netdev->addr_len; i++) for (i = 0; i < netdev->addr_len; i++)
perm_addr[i] = adapter->hw.mac.perm_addr[i]; perm_addr[i] = adapter->hw.mac.perm_addr[i];
if (adapter->hw.mac.type == ixgbe_mac_82599EB) { switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
for (j = 0; j < netdev->addr_len; j++, i++) for (j = 0; j < netdev->addr_len; j++, i++)
perm_addr[i] = adapter->hw.mac.san_addr[j]; perm_addr[i] = adapter->hw.mac.san_addr[j];
break;
default:
break;
} }
} }
...@@ -366,15 +383,29 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) ...@@ -366,15 +383,29 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
} }
if (adapter->dcb_cfg.pfc_mode_enable) { if (adapter->dcb_cfg.pfc_mode_enable) {
if ((adapter->hw.mac.type != ixgbe_mac_82598EB) && switch (adapter->hw.mac.type) {
(adapter->hw.fc.current_mode != ixgbe_fc_pfc)) case ixgbe_mac_82599EB:
adapter->last_lfc_mode = adapter->hw.fc.current_mode; case ixgbe_mac_X540:
if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
adapter->last_lfc_mode =
adapter->hw.fc.current_mode;
break;
default:
break;
}
adapter->hw.fc.requested_mode = ixgbe_fc_pfc; adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
} else { } else {
if (adapter->hw.mac.type != ixgbe_mac_82598EB) switch (adapter->hw.mac.type) {
adapter->hw.fc.requested_mode = adapter->last_lfc_mode; case ixgbe_mac_82598EB:
else
adapter->hw.fc.requested_mode = ixgbe_fc_none; adapter->hw.fc.requested_mode = ixgbe_fc_none;
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
break;
default:
break;
}
} }
if (adapter->dcb_set_bitmap & BIT_RESETLINK) { if (adapter->dcb_set_bitmap & BIT_RESETLINK) {
......
drivers/net/ixgbe/ixgbe_ethtool.c
View file @ b93a2226
...@@ -431,15 +431,21 @@ static u32 ixgbe_get_tx_csum(struct net_device *netdev) ...@@ -431,15 +431,21 @@ static u32 ixgbe_get_tx_csum(struct net_device *netdev)
static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
{ {
struct ixgbe_adapter *adapter = netdev_priv(netdev); struct ixgbe_adapter *adapter = netdev_priv(netdev);
u32 feature_list;
if (data) { feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; switch (adapter->hw.mac.type) {
if (adapter->hw.mac.type == ixgbe_mac_82599EB) case ixgbe_mac_82599EB:
netdev->features |= NETIF_F_SCTP_CSUM; case ixgbe_mac_X540:
} else { feature_list |= NETIF_F_SCTP_CSUM;
netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | break;
NETIF_F_SCTP_CSUM); default:
break;
} }
if (data)
netdev->features |= feature_list;
else
netdev->features &= ~feature_list;
return 0; return 0;
} }
...@@ -1250,6 +1256,7 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) ...@@ -1250,6 +1256,7 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
test = reg_test_82598; test = reg_test_82598;
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
toggle = 0x7FFFF30F; toggle = 0x7FFFF30F;
test = reg_test_82599; test = reg_test_82599;
break; break;
...@@ -1476,6 +1483,7 @@ static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) ...@@ -1476,6 +1483,7 @@ static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
switch (hw->mac.type) { switch (hw->mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
reg_ctl &= ~IXGBE_DMATXCTL_TE; reg_ctl &= ~IXGBE_DMATXCTL_TE;
IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl); IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
...@@ -1512,6 +1520,7 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) ...@@ -1512,6 +1520,7 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
switch (adapter->hw.mac.type) { switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
reg_data |= IXGBE_DMATXCTL_TE; reg_data |= IXGBE_DMATXCTL_TE;
IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
...@@ -2198,6 +2207,22 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data) ...@@ -2198,6 +2207,22 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data)
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
need_reset = true; need_reset = true;
break; break;
case ixgbe_mac_X540: {
int i;
for (i = 0; i < adapter->num_rx_queues; i++) {
struct ixgbe_ring *ring =
adapter->rx_ring[i];
if (adapter->flags2 &
IXGBE_FLAG2_RSC_ENABLED) {
ixgbe_configure_rscctl(adapter,
ring);
} else {
ixgbe_clear_rscctl(adapter,
ring);
}
}
}
break;
default: default:
break; break;
} }
......
drivers/net/ixgbe/ixgbe_main.c
View file @ b93a2226
...@@ -113,6 +113,8 @@ static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = { ...@@ -113,6 +113,8 @@ static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
board_82599 }, board_82599 },
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE),
board_82599 }, board_82599 },
{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T),
board_82599 },
/* required last entry */ /* required last entry */
{0, } {0, }
...@@ -561,6 +563,7 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction, ...@@ -561,6 +563,7 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
if (direction == -1) { if (direction == -1) {
/* other causes */ /* other causes */
msix_vector |= IXGBE_IVAR_ALLOC_VAL; msix_vector |= IXGBE_IVAR_ALLOC_VAL;
...@@ -596,6 +599,7 @@ static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, ...@@ -596,6 +599,7 @@ static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
mask = (qmask & 0xFFFFFFFF); mask = (qmask & 0xFFFFFFFF);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
mask = (qmask >> 32); mask = (qmask >> 32);
...@@ -923,6 +927,7 @@ static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, ...@@ -923,6 +927,7 @@ static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599; rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599); IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
...@@ -956,6 +961,7 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, ...@@ -956,6 +961,7 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(reg_idx), txctrl); IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(reg_idx), txctrl);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx)); txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx));
txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
...@@ -1581,6 +1587,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) ...@@ -1581,6 +1587,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
v_idx); v_idx);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
ixgbe_set_ivar(adapter, -1, 1, v_idx); ixgbe_set_ivar(adapter, -1, 1, v_idx);
break; break;
...@@ -1688,8 +1695,9 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector) ...@@ -1688,8 +1695,9 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
itr_reg |= (itr_reg << 16); itr_reg |= (itr_reg << 16);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
/* /*
* 82599 can support a value of zero, so allow it for * 82599 and X540 can support a value of zero, so allow it for
* max interrupt rate, but there is an errata where it can * max interrupt rate, but there is an errata where it can
* not be zero with RSC * not be zero with RSC
*/ */
...@@ -1885,6 +1893,7 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data) ...@@ -1885,6 +1893,7 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
switch (hw->mac.type) { switch (hw->mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
/* Handle Flow Director Full threshold interrupt */ /* Handle Flow Director Full threshold interrupt */
if (eicr & IXGBE_EICR_FLOW_DIR) { if (eicr & IXGBE_EICR_FLOW_DIR) {
int i; int i;
...@@ -1930,6 +1939,7 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter, ...@@ -1930,6 +1939,7 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
mask = (qmask & 0xFFFFFFFF); mask = (qmask & 0xFFFFFFFF);
if (mask) if (mask)
IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
...@@ -1955,6 +1965,7 @@ static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter, ...@@ -1955,6 +1965,7 @@ static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
mask = (qmask & 0xFFFFFFFF); mask = (qmask & 0xFFFFFFFF);
if (mask) if (mask)
IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
...@@ -2427,6 +2438,7 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues, ...@@ -2427,6 +2438,7 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
mask |= IXGBE_EIMS_GPI_SDP1; mask |= IXGBE_EIMS_GPI_SDP1;
switch (adapter->hw.mac.type) { switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
mask |= IXGBE_EIMS_ECC; mask |= IXGBE_EIMS_ECC;
mask |= IXGBE_EIMS_GPI_SDP1; mask |= IXGBE_EIMS_GPI_SDP1;
mask |= IXGBE_EIMS_GPI_SDP2; mask |= IXGBE_EIMS_GPI_SDP2;
...@@ -2492,6 +2504,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data) ...@@ -2492,6 +2504,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
switch (hw->mac.type) { switch (hw->mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
ixgbe_check_sfp_event(adapter, eicr); ixgbe_check_sfp_event(adapter, eicr);
if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) && if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC))) { ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC))) {
...@@ -2601,6 +2614,7 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) ...@@ -2601,6 +2614,7 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
...@@ -2795,6 +2809,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, ...@@ -2795,6 +2809,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
} }
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
default: default:
break; break;
} }
...@@ -2891,12 +2906,29 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) ...@@ -2891,12 +2906,29 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
} }
/**
* ixgbe_clear_rscctl - disable RSC for the indicated ring
* @adapter: address of board private structure
* @ring: structure containing ring specific data
**/
void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter,
struct ixgbe_ring *ring)
{
struct ixgbe_hw *hw = &adapter->hw;
u32 rscctrl;
u8 reg_idx = ring->reg_idx;
rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
rscctrl &= ~IXGBE_RSCCTL_RSCEN;
IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
}
/** /**
* ixgbe_configure_rscctl - enable RSC for the indicated ring * ixgbe_configure_rscctl - enable RSC for the indicated ring
* @adapter: address of board private structure * @adapter: address of board private structure
* @index: index of ring to set * @index: index of ring to set
**/ **/
static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
struct ixgbe_ring *ring) struct ixgbe_ring *ring)
{ {
struct ixgbe_hw *hw = &adapter->hw; struct ixgbe_hw *hw = &adapter->hw;
...@@ -3201,6 +3233,7 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter) ...@@ -3201,6 +3233,7 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
rdrxctl |= IXGBE_RDRXCTL_MVMEN; rdrxctl |= IXGBE_RDRXCTL_MVMEN;
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
/* Disable RSC for ACK packets */ /* Disable RSC for ACK packets */
IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
(IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
...@@ -3328,6 +3361,7 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter) ...@@ -3328,6 +3361,7 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
for (i = 0; i < adapter->num_rx_queues; i++) { for (i = 0; i < adapter->num_rx_queues; i++) {
j = adapter->rx_ring[i]->reg_idx; j = adapter->rx_ring[i]->reg_idx;
vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
...@@ -3357,6 +3391,7 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter) ...@@ -3357,6 +3391,7 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
for (i = 0; i < adapter->num_rx_queues; i++) { for (i = 0; i < adapter->num_rx_queues; i++) {
j = adapter->rx_ring[i]->reg_idx; j = adapter->rx_ring[i]->reg_idx;
vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
...@@ -3712,8 +3747,9 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) ...@@ -3712,8 +3747,9 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
case ixgbe_mac_82598EB: case ixgbe_mac_82598EB:
IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
break; break;
default:
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
default:
IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
break; break;
...@@ -4061,6 +4097,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter) ...@@ -4061,6 +4097,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
/* Disable the Tx DMA engine on 82599 */ /* Disable the Tx DMA engine on 82599 */
switch (hw->mac.type) { switch (hw->mac.type) {
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
(IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
~IXGBE_DMATXCTL_TE)); ~IXGBE_DMATXCTL_TE));
...@@ -4435,6 +4472,7 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter) ...@@ -4435,6 +4472,7 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
ret = true; ret = true;
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
if (dcb_i == 8) { if (dcb_i == 8) {
/* /*
* Tx TC0 starts at: descriptor queue 0 * Tx TC0 starts at: descriptor queue 0
...@@ -5049,6 +5087,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) ...@@ -5049,6 +5087,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598; adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599; adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
...@@ -5567,6 +5606,7 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) ...@@ -5567,6 +5606,7 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
pci_wake_from_d3(pdev, false); pci_wake_from_d3(pdev, false);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
pci_wake_from_d3(pdev, !!wufc); pci_wake_from_d3(pdev, !!wufc);
break; break;
default: default:
...@@ -5696,6 +5736,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) ...@@ -5696,6 +5736,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
hwstats->pxonrxc[i] += hwstats->pxonrxc[i] +=
IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
break; break;
...@@ -5720,6 +5761,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) ...@@ -5720,6 +5761,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
break; break;
case ixgbe_mac_82599EB: case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
...@@ -5983,7 +6025,8 @@ static void ixgbe_watchdog_task(struct work_struct *work) ...@@ -5983,7 +6025,8 @@ static void ixgbe_watchdog_task(struct work_struct *work)
flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
} }
break; break;
case ixgbe_mac_82599EB: { case ixgbe_mac_82599EB:
case ixgbe_mac_X540: {
u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
...@@ -7057,8 +7100,14 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, ...@@ -7057,8 +7100,14 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
goto err_sw_init; goto err_sw_init;
/* Make it possible the adapter to be woken up via WOL */ /* Make it possible the adapter to be woken up via WOL */
if (adapter->hw.mac.type == ixgbe_mac_82599EB) switch (adapter->hw.mac.type) {
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
break;
default:
break;
}
/* /*
* If there is a fan on this device and it has failed log the * If there is a fan on this device and it has failed log the
......
drivers/net/ixgbe/ixgbe_mbx.c
View file @ b93a2226
...@@ -319,8 +319,14 @@ static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number) ...@@ -319,8 +319,14 @@ static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
u32 vflre = 0; u32 vflre = 0;
s32 ret_val = IXGBE_ERR_MBX; s32 ret_val = IXGBE_ERR_MBX;
if (hw->mac.type == ixgbe_mac_82599EB) switch (hw->mac.type) {
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
break;
default:
break;
}
if (vflre & (1 << vf_shift)) { if (vflre & (1 << vf_shift)) {
ret_val = 0; ret_val = 0;
...@@ -439,9 +445,9 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) ...@@ -439,9 +445,9 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
{ {
struct ixgbe_mbx_info *mbx = &hw->mbx; struct ixgbe_mbx_info *mbx = &hw->mbx;
if (hw->mac.type != ixgbe_mac_82599EB) switch (hw->mac.type) {
return; case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
mbx->timeout = 0; mbx->timeout = 0;
mbx->usec_delay = 0; mbx->usec_delay = 0;
...@@ -452,6 +458,10 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) ...@@ -452,6 +458,10 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
mbx->stats.reqs = 0; mbx->stats.reqs = 0;
mbx->stats.acks = 0; mbx->stats.acks = 0;
mbx->stats.rsts = 0; mbx->stats.rsts = 0;
break;
default:
break;
}
} }
struct ixgbe_mbx_operations mbx_ops_generic = { struct ixgbe_mbx_operations mbx_ops_generic = {
......
drivers/net/ixgbe/ixgbe_type.h
View file @ b93a2226
...@@ -58,6 +58,7 @@ ...@@ -58,6 +58,7 @@
#define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC
#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8
#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C
#define IXGBE_DEV_ID_X540T 0x1528
/* General Registers */ /* General Registers */
#define IXGBE_CTRL 0x00000 #define IXGBE_CTRL 0x00000
......
drivers/net/ixgbe/ixgbe_x540.c
View file @ b93a2226
...@@ -46,7 +46,7 @@ static void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask); ...@@ -46,7 +46,7 @@ static void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask);
static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw); static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);
static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw); static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);
enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) static enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)
{ {
return ixgbe_media_type_copper; return ixgbe_media_type_copper;
} }
...@@ -75,7 +75,7 @@ static s32 ixgbe_get_invariants_X540(struct ixgbe_hw *hw) ...@@ -75,7 +75,7 @@ static s32 ixgbe_get_invariants_X540(struct ixgbe_hw *hw)
* @autoneg: true if autonegotiation enabled * @autoneg: true if autonegotiation enabled
* @autoneg_wait_to_complete: true when waiting for completion is needed * @autoneg_wait_to_complete: true when waiting for completion is needed
**/ **/
s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, static s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
ixgbe_link_speed speed, bool autoneg, ixgbe_link_speed speed, bool autoneg,
bool autoneg_wait_to_complete) bool autoneg_wait_to_complete)
{ {
...@@ -91,7 +91,7 @@ s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ...@@ -91,7 +91,7 @@ s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,
* and clears all interrupts, perform a PHY reset, and perform a link (MAC) * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
* reset. * reset.
**/ **/
s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
{ {
ixgbe_link_speed link_speed; ixgbe_link_speed link_speed;
s32 status = 0; s32 status = 0;
...@@ -222,7 +222,7 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) ...@@ -222,7 +222,7 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)
* *
* Determines physical layer capabilities of the current configuration. * Determines physical layer capabilities of the current configuration.
**/ **/
u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) static u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
{ {
u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN;
u16 ext_ability = 0; u16 ext_ability = 0;
...@@ -245,7 +245,7 @@ u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) ...@@ -245,7 +245,7 @@ u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)
* ixgbe_init_eeprom_params_X540 - Initialize EEPROM params * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
* @hw: pointer to hardware structure * @hw: pointer to hardware structure
**/ **/
s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) static s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
{ {
struct ixgbe_eeprom_info *eeprom = &hw->eeprom; struct ixgbe_eeprom_info *eeprom = &hw->eeprom;
u32 eec; u32 eec;
...@@ -274,7 +274,7 @@ s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) ...@@ -274,7 +274,7 @@ s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)
* @offset: offset of word in the EEPROM to read * @offset: offset of word in the EEPROM to read
* @data: word read from the EERPOM * @data: word read from the EERPOM
**/ **/
s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) static s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)
{ {
s32 status; s32 status;
...@@ -295,7 +295,7 @@ s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) ...@@ -295,7 +295,7 @@ s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)
* *
* Write a 16 bit word to the EEPROM using the EEWR register. * Write a 16 bit word to the EEPROM using the EEWR register.
**/ **/
s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) static s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)
{ {
u32 eewr; u32 eewr;
s32 status; s32 status;
...@@ -406,7 +406,7 @@ static u16 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) ...@@ -406,7 +406,7 @@ static u16 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)
* checksum and updates the EEPROM and instructs the hardware to update * checksum and updates the EEPROM and instructs the hardware to update
* the flash. * the flash.
**/ **/
s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) static s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw)
{ {
s32 status; s32 status;
......
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