Commit b9688310 authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle

MIPS: Whitespace cleanups and reformatting.

Signed-off-by: default avatarSteven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <sjhill@mips.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4781/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bc4f2975
...@@ -1143,16 +1143,20 @@ do { \ ...@@ -1143,16 +1143,20 @@ do { \
* Macros to access the floating point coprocessor control registers * Macros to access the floating point coprocessor control registers
*/ */
#define read_32bit_cp1_register(source) \ #define read_32bit_cp1_register(source) \
({ int __res; \ ({ \
int __res; \
\
__asm__ __volatile__( \ __asm__ __volatile__( \
".set\tpush\n\t" \ " .set push \n" \
".set\treorder\n\t" \ " .set reorder \n" \
/* gas fails to assemble cfc1 for some archs (octeon).*/ \ " # gas fails to assemble cfc1 for some archs, \n" \
".set\tmips1\n\t" \ " # like Octeon. \n" \
"cfc1\t%0,"STR(source)"\n\t" \ " .set mips1 \n" \
".set\tpop" \ " cfc1 %0,"STR(source)" \n" \
" .set pop \n" \
: "=r" (__res)); \ : "=r" (__res)); \
__res;}) __res; \
})
#define rddsp(mask) \ #define rddsp(mask) \
({ \ ({ \
......
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