Commit b983a8f4 authored by Slava Grigorev's avatar Slava Grigorev Committed by Alex Deucher

radeon/audio: fix whitespace

Use proper tabs.
Signed-off-by: default avatarSlava Grigorev <slava.grigorev@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5c046a57
...@@ -252,40 +252,40 @@ void dce6_audio_enable(struct radeon_device *rdev, ...@@ -252,40 +252,40 @@ void dce6_audio_enable(struct radeon_device *rdev,
void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
struct radeon_crtc *crtc, unsigned int clock) struct radeon_crtc *crtc, unsigned int clock)
{ {
/* Two dtos; generally use dto0 for HDMI */ /* Two dtos; generally use dto0 for HDMI */
u32 value = 0; u32 value = 0;
if (crtc) if (crtc)
value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);
WREG32(DCCG_AUDIO_DTO_SOURCE, value); WREG32(DCCG_AUDIO_DTO_SOURCE, value);
/* Express [24MHz / target pixel clock] as an exact rational /* Express [24MHz / target pixel clock] as an exact rational
* number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
* is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
*/ */
WREG32(DCCG_AUDIO_DTO0_PHASE, 24000); WREG32(DCCG_AUDIO_DTO0_PHASE, 24000);
WREG32(DCCG_AUDIO_DTO0_MODULE, clock); WREG32(DCCG_AUDIO_DTO0_MODULE, clock);
} }
void dce6_dp_audio_set_dto(struct radeon_device *rdev, void dce6_dp_audio_set_dto(struct radeon_device *rdev,
struct radeon_crtc *crtc, unsigned int clock) struct radeon_crtc *crtc, unsigned int clock)
{ {
/* Two dtos; generally use dto1 for DP */ /* Two dtos; generally use dto1 for DP */
u32 value = 0; u32 value = 0;
value |= DCCG_AUDIO_DTO_SEL; value |= DCCG_AUDIO_DTO_SEL;
if (crtc) if (crtc)
value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);
WREG32(DCCG_AUDIO_DTO_SOURCE, value); WREG32(DCCG_AUDIO_DTO_SOURCE, value);
/* Express [24MHz / target pixel clock] as an exact rational /* Express [24MHz / target pixel clock] as an exact rational
* number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
* is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
*/ */
WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);
WREG32(DCCG_AUDIO_DTO1_MODULE, clock); WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
} }
void dce6_dp_enable(struct drm_encoder *encoder, bool enable) void dce6_dp_enable(struct drm_encoder *encoder, bool enable)
......
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