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Commit b9a68924 authored by Jeff Garzik's avatar Jeff Garzik
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Merge redhat.com:/spare/repo/linux-2.6 

into redhat.com:/spare/repo/libata-2.6
parents f158809e 04b29c99
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Showing with 458 additions and 234 deletions
drivers/scsi/Kconfig
View file @ b9a68924
......@@ -449,6 +449,14 @@ config SCSI_SATA_SIL
If unsure, say N.
config SCSI_SATA_SIS
tristate "SiS 964/180 SATA support"
depends on SCSI_SATA && PCI
help
This option enables support for SiS Serial ATA 964/180.
If unsure, say N.
config SCSI_SATA_VIA
tristate "VIA SATA support"
depends on SCSI_SATA && PCI && EXPERIMENTAL
......
drivers/scsi/Makefile
View file @ b9a68924
......@@ -123,6 +123,7 @@ obj-$(CONFIG_SCSI_SATA_PROMISE) += libata.o sata_promise.o
obj-$(CONFIG_SCSI_SATA_SIL) += libata.o sata_sil.o
obj-$(CONFIG_SCSI_SATA_VIA) += libata.o sata_via.o
obj-$(CONFIG_SCSI_SATA_VITESSE) += libata.o sata_vsc.o
obj-$(CONFIG_SCSI_SATA_SIS) += libata.o sata_sis.o
obj-$(CONFIG_ARM) += arm/
......
drivers/scsi/ata_piix.c
View file @ b9a68924
......@@ -28,17 +28,24 @@
#include <linux/libata.h>
#define DRV_NAME "ata_piix"
#define DRV_VERSION "1.01"
#define DRV_VERSION "1.02"
enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
ICH5_PMR = 0x90, /* port mapping register */
ICH5_PCS = 0x92, /* port control and status */
PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */
PIIX_FLAG_COMBINED = (1 << 30), /* combined mode possible */
PIIX_COMB_PRI = (1 << 0), /* combined mode, PATA primary */
PIIX_COMB_SEC = (1 << 1), /* combined mode, PATA secondary */
/* combined mode. if set, PATA is channel 0.
* if clear, PATA is channel 1.
*/
PIIX_COMB_PATA_P0 = (1 << 1),
PIIX_COMB = (1 << 2), /* combined mode enabled? */
PIIX_PORT_PRESENT = (1 << 0),
PIIX_PORT_ENABLED = (1 << 4),
PIIX_80C_PRI = (1 << 5) | (1 << 4),
PIIX_80C_SEC = (1 << 7) | (1 << 6),
......@@ -53,7 +60,6 @@ static int piix_init_one (struct pci_dev *pdev,
static void piix_pata_phy_reset(struct ata_port *ap);
static void piix_sata_phy_reset(struct ata_port *ap);
static void piix_sata_port_disable(struct ata_port *ap);
static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev,
unsigned int pio);
static void piix_set_udmamode (struct ata_port *ap, struct ata_device *adev,
......@@ -137,7 +143,7 @@ static struct ata_port_operations piix_pata_ops = {
};
static struct ata_port_operations piix_sata_ops = {
.port_disable = piix_sata_port_disable,
.port_disable = ata_port_disable,
.set_piomode = piix_set_piomode,
.set_udmamode = piix_set_udmamode,
......@@ -259,54 +265,48 @@ static void piix_pata_phy_reset(struct ata_port *ap)
}
/**
* piix_pcs_probe - Probe SATA port configuration and status register
* @ap: Port to probe
* @have_port: (output) Non-zero if SATA port is enabled
* @have_device: (output) Non-zero if SATA phy indicates device present
* piix_sata_probe - Probe PCI device for present SATA devices
* @pdev: PCI device to probe
*
* Reads SATA PCI device's PCI config register Port Configuration
* and Status (PCS) to determine port and device availability.
*
* LOCKING:
* None (inherited from caller).
*/
static void piix_pcs_probe (struct ata_port *ap, unsigned int *have_port,
unsigned int *have_device)
{
struct pci_dev *pdev = ap->host_set->pdev;
u16 pcs;
pci_read_config_word(pdev, ICH5_PCS, &pcs);
/* is SATA port enabled? */
if (pcs & (1 << ap->port_no)) {
*have_port = 1;
if (pcs & (1 << (ap->port_no + 4)))
*have_device = 1;
}
}
/**
* piix_pcs_disable - Disable SATA port
* @ap: Port to disable
*
* Disable SATA phy for specified port.
*
* LOCKING:
* None (inherited from caller).
* RETURNS:
* Non-zero if device detected, zero otherwise.
*/
static void piix_pcs_disable (struct ata_port *ap)
static int piix_sata_probe (struct ata_port *ap)
{
struct pci_dev *pdev = ap->host_set->pdev;
u16 pcs;
int combined = (ap->flags & ATA_FLAG_SLAVE_POSS);
int orig_mask, mask, i;
u8 pcs;
mask = (PIIX_PORT_PRESENT << ap->port_no) |
(PIIX_PORT_ENABLED << ap->port_no);
pci_read_config_byte(pdev, ICH5_PCS, &pcs);
orig_mask = (int) pcs & 0xff;
/* TODO: this is vaguely wrong for ICH6 combined mode,
* where only two of the four SATA ports are mapped
* onto a single ATA channel. It is also vaguely inaccurate
* for ICH5, which has only two ports. However, this is ok,
* as further device presence detection code will handle
* any false positives produced here.
*/
pci_read_config_word(pdev, ICH5_PCS, &pcs);
for (i = 0; i < 4; i++) {
mask = (PIIX_PORT_PRESENT << i) | (PIIX_PORT_ENABLED << i);
if (pcs & (1 << ap->port_no)) {
pcs &= ~(1 << ap->port_no);
pci_write_config_word(pdev, ICH5_PCS, pcs);
if ((orig_mask & mask) == mask)
if (combined || (i == ap->port_no))
return 1;
}
return 0;
}
/**
......@@ -321,8 +321,6 @@ static void piix_pcs_disable (struct ata_port *ap)
static void piix_sata_phy_reset(struct ata_port *ap)
{
unsigned int have_port = 0, have_dev = 0;
if (!pci_test_config_bits(ap->host_set->pdev,
&piix_enable_bits[ap->port_no])) {
ata_port_disable(ap);
......@@ -330,21 +328,9 @@ static void piix_sata_phy_reset(struct ata_port *ap)
return;
}
piix_pcs_probe(ap, &have_port, &have_dev);
/* if port not enabled, exit */
if (!have_port) {
if (!piix_sata_probe(ap)) {
ata_port_disable(ap);
printk(KERN_INFO "ata%u: SATA port disabled. ignoring.\n",
ap->id);
return;
}
/* if port enabled but no device, disable port and exit */
if (!have_dev) {
piix_sata_port_disable(ap);
printk(KERN_INFO "ata%u: SATA port has no device. disabling.\n",
ap->id);
printk(KERN_INFO "ata%u: SATA port has no device.\n", ap->id);
return;
}
......@@ -355,22 +341,6 @@ static void piix_sata_phy_reset(struct ata_port *ap)
ata_bus_reset(ap);
}
/**
* piix_sata_port_disable - Disable SATA port
* @ap: Port to disable.
*
* Disable SATA port.
*
* LOCKING:
* None (inherited from caller).
*/
static void piix_sata_port_disable(struct ata_port *ap)
{
ata_port_disable(ap);
piix_pcs_disable(ap);
}
/**
* piix_set_piomode - Initialize host controller PATA PIO timings
* @ap: Port whose timings we are configuring
......@@ -493,31 +463,6 @@ static void piix_set_udmamode (struct ata_port *ap, struct ata_device *adev,
}
}
/**
* piix_probe_combined - Determine if PATA and SATA are combined
* @pdev: PCI device to examine
* @mask: (output) zero, %PIIX_COMB_PRI or %PIIX_COMB_SEC
*
* Determine if BIOS has secretly stuffed a PATA port into our
* otherwise-beautiful SATA PCI device.
*
* LOCKING:
* Inherited from PCI layer (may sleep).
*/
static void piix_probe_combined (struct pci_dev *pdev, unsigned int *mask)
{
u8 tmp;
pci_read_config_byte(pdev, 0x90, &tmp); /* combined mode reg */
tmp &= 0x6; /* interesting bits 2:1, PATA primary/secondary */
/* backwards from what one might expect */
if (tmp == 0x4) /* bits 10x */
*mask |= PIIX_COMB_SEC;
if (tmp == 0x6) /* bits 11x */
*mask |= PIIX_COMB_PRI;
}
/* move to PCI layer, integrate w/ MSI stuff */
static void pci_enable_intx(struct pci_dev *pdev)
{
......@@ -550,7 +495,7 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
static int printed_version;
struct ata_port_info *port_info[2];
unsigned int combined = 0, n_ports = 1;
unsigned int pata_comb = 0, sata_comb = 0;
unsigned int pata_chan = 0, sata_chan = 0;
if (!printed_version++)
printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n");
......@@ -561,8 +506,19 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
port_info[0] = &piix_port_info[ent->driver_data];
port_info[1] = NULL;
if (port_info[0]->host_flags & PIIX_FLAG_COMBINED)
piix_probe_combined(pdev, &combined);
if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) {
u8 tmp;
pci_read_config_byte(pdev, ICH5_PMR, &tmp);
if (tmp & PIIX_COMB) {
combined = 1;
if (tmp & PIIX_COMB_PATA_P0)
sata_chan = 1;
else
pata_chan = 1;
}
}
/* On ICH5, some BIOSen disable the interrupt using the
* PCI_COMMAND_INTX_DISABLE bit added in PCI 2.3.
......@@ -573,15 +529,10 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
if (port_info[0]->host_flags & PIIX_FLAG_CHECKINTR)
pci_enable_intx(pdev);
if (combined & PIIX_COMB_PRI)
sata_comb = 1;
else if (combined & PIIX_COMB_SEC)
pata_comb = 1;
if (pata_comb || sata_comb) {
port_info[sata_comb] = &piix_port_info[ent->driver_data];
port_info[sata_comb]->host_flags |= ATA_FLAG_SLAVE_POSS; /* sigh */
port_info[pata_comb] = &piix_port_info[ich5_pata]; /*ich5-specific*/
if (combined) {
port_info[sata_chan] = &piix_port_info[ent->driver_data];
port_info[sata_chan]->host_flags |= ATA_FLAG_SLAVE_POSS;
port_info[pata_chan] = &piix_port_info[ich5_pata];
n_ports++;
printk(KERN_WARNING DRV_NAME ": combined mode detected\n");
......
drivers/scsi/libata-core.c
View file @ b9a68924
......@@ -439,6 +439,57 @@ u8 ata_check_status_mmio(struct ata_port *ap)
return readb((void *) ap->ioaddr.status_addr);
}
static int ata_prot_to_cmd(int protocol, int lba48)
{
int rcmd = 0, wcmd = 0;
switch (protocol) {
case ATA_PROT_PIO:
if (lba48) {
rcmd = ATA_CMD_PIO_READ_EXT;
wcmd = ATA_CMD_PIO_WRITE_EXT;
} else {
rcmd = ATA_CMD_PIO_READ;
wcmd = ATA_CMD_PIO_WRITE;
}
break;
case ATA_PROT_DMA:
if (lba48) {
rcmd = ATA_CMD_READ_EXT;
wcmd = ATA_CMD_WRITE_EXT;
} else {
rcmd = ATA_CMD_READ;
wcmd = ATA_CMD_WRITE;
}
break;
default:
return -1;
}
return rcmd | (wcmd << 8);
}
static void ata_dev_set_protocol(struct ata_device *dev)
{
int pio = (dev->flags & ATA_DFLAG_PIO);
int lba48 = (dev->flags & ATA_DFLAG_LBA48);
int proto, cmd;
if (pio)
proto = dev->xfer_protocol = ATA_PROT_PIO;
else
proto = dev->xfer_protocol = ATA_PROT_DMA;
cmd = ata_prot_to_cmd(proto, lba48);
if (cmd < 0)
BUG();
dev->read_cmd = cmd & 0xff;
dev->write_cmd = (cmd >> 8) & 0xff;
}
static const char * udma_str[] = {
"UDMA/16",
"UDMA/25",
......@@ -843,7 +894,7 @@ static void ata_dev_identify(struct ata_port *ap, unsigned int device)
retry:
ata_tf_init(ap, &tf, device);
tf.ctl |= ATA_NIEN;
tf.protocol = ATA_PROT_PIO_READ;
tf.protocol = ATA_PROT_PIO;
if (dev->class == ATA_DEV_ATA) {
tf.command = ATA_CMD_ID_ATA;
......@@ -1129,7 +1180,7 @@ void ata_port_disable(struct ata_port *ap)
*/
static void ata_set_mode(struct ata_port *ap)
{
unsigned int force_pio;
unsigned int force_pio, i;
ata_host_set_pio(ap);
if (ap->flags & ATA_FLAG_PORT_DISABLED)
......@@ -1148,19 +1199,21 @@ static void ata_set_mode(struct ata_port *ap)
if (force_pio) {
ata_dev_set_pio(ap, 0);
ata_dev_set_pio(ap, 1);
if (ap->flags & ATA_FLAG_PORT_DISABLED)
return;
} else {
ata_dev_set_udma(ap, 0);
ata_dev_set_udma(ap, 1);
}
if (ap->flags & ATA_FLAG_PORT_DISABLED)
return;
}
if (ap->ops->post_set_mode)
ap->ops->post_set_mode(ap);
for (i = 0; i < 2; i++) {
struct ata_device *dev = &ap->device[i];
ata_dev_set_protocol(dev);
}
}
/**
......@@ -1725,6 +1778,7 @@ static int ata_sg_setup_one(struct ata_queued_cmd *qc)
int dir = scsi_to_pci_dma_dir(cmd->sc_data_direction);
struct scatterlist *sg = qc->sg;
unsigned int have_sg = (qc->flags & ATA_QCFLAG_SG);
dma_addr_t dma_address;
assert(sg == &qc->sgent);
assert(qc->n_elem == 1);
......@@ -1736,12 +1790,15 @@ static int ata_sg_setup_one(struct ata_queued_cmd *qc)
if (!have_sg)
return 0;
sg_dma_address(sg) = pci_map_single(ap->host_set->pdev,
cmd->request_buffer,
dma_address = pci_map_single(ap->host_set->pdev, cmd->request_buffer,
cmd->request_bufflen, dir);
if (pci_dma_error(dma_address))
return -1;
sg_dma_address(sg) = dma_address;
DPRINTK("mapped buffer of %d bytes for %s\n", cmd->request_bufflen,
qc->flags & ATA_QCFLAG_WRITE ? "write" : "read");
qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
return 0;
}
......@@ -1842,8 +1899,7 @@ static void ata_pio_start (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
assert((qc->tf.protocol == ATA_PROT_PIO_READ) ||
(qc->tf.protocol == ATA_PROT_PIO_WRITE));
assert(qc->tf.protocol == ATA_PROT_PIO);
qc->flags |= ATA_QCFLAG_POLL;
qc->tf.ctl |= ATA_NIEN; /* disable interrupts */
......@@ -1963,12 +2019,12 @@ static void ata_pio_sector(struct ata_port *ap)
}
DPRINTK("data %s, drv_stat 0x%X\n",
qc->flags & ATA_QCFLAG_WRITE ? "write" : "read",
qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read",
status);
/* do the actual data transfer */
/* FIXME: mmio-ize */
if (qc->flags & ATA_QCFLAG_WRITE)
if (qc->tf.flags & ATA_TFLAG_WRITE)
outsl(ap->ioaddr.data_addr, buf, ATA_SECT_DWORDS);
else
insl(ap->ioaddr.data_addr, buf, ATA_SECT_DWORDS);
......@@ -2033,8 +2089,7 @@ void ata_eng_timeout(struct ata_port *ap)
qc->scsidone = scsi_finish_command;
switch (qc->tf.protocol) {
case ATA_PROT_DMA_READ:
case ATA_PROT_DMA_WRITE:
case ATA_PROT_DMA:
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
host_stat = readb(mmio + ATA_DMA_STATUS);
......@@ -2258,7 +2313,7 @@ int ata_qc_issue(struct ata_queued_cmd *qc)
void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
unsigned int rw = (qc->flags & ATA_QCFLAG_WRITE);
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
u8 host_stat, dmactl;
void *mmio = (void *) ap->ioaddr.bmdma_addr;
......@@ -2307,7 +2362,7 @@ void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
unsigned int rw = (qc->flags & ATA_QCFLAG_WRITE);
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
u8 host_stat, dmactl;
/* load PRD table addr. */
......@@ -2402,8 +2457,7 @@ inline unsigned int ata_host_intr (struct ata_port *ap,
unsigned int handled = 0;
switch (qc->tf.protocol) {
case ATA_PROT_DMA_READ:
case ATA_PROT_DMA_WRITE:
case ATA_PROT_DMA:
if (ap->flags & ATA_FLAG_MMIO) {
void *mmio = (void *) ap->ioaddr.bmdma_addr;
host_stat = readb(mmio + ATA_DMA_STATUS);
......
drivers/scsi/libata-scsi.c
View file @ b9a68924
......@@ -102,7 +102,7 @@ void ata_to_sense_error(struct ata_queued_cmd *qc)
cmd->sense_buffer[7] = 14 - 8; /* addnl. sense len. FIXME: correct? */
/* additional-sense-code[-qualifier] */
if ((qc->flags & ATA_QCFLAG_WRITE) == 0) {
if (cmd->sc_data_direction == SCSI_DATA_READ) {
cmd->sense_buffer[12] = 0x11; /* "unrecovered read error" */
cmd->sense_buffer[13] = 0x04;
} else {
......@@ -172,7 +172,6 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd,
{
struct ata_taskfile *tf = &qc->tf;
unsigned int lba48 = tf->flags & ATA_TFLAG_LBA48;
unsigned int dma = qc->flags & ATA_QCFLAG_DMA;
qc->cursect = qc->cursg = qc->cursg_ofs = 0;
tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
......@@ -180,39 +179,15 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd,
tf->hob_lbal = 0;
tf->hob_lbam = 0;
tf->hob_lbah = 0;
tf->protocol = qc->dev->xfer_protocol;
if (scsicmd[0] == READ_10 || scsicmd[0] == READ_6 ||
scsicmd[0] == READ_16) {
if (likely(dma)) {
if (lba48)
tf->command = ATA_CMD_READ_EXT;
else
tf->command = ATA_CMD_READ;
tf->protocol = ATA_PROT_DMA_READ;
} else {
if (lba48)
tf->command = ATA_CMD_PIO_READ_EXT;
else
tf->command = ATA_CMD_PIO_READ;
tf->protocol = ATA_PROT_PIO_READ;
}
qc->flags &= ~ATA_QCFLAG_WRITE;
tf->command = qc->dev->read_cmd;
VPRINTK("reading\n");
} else {
if (likely(dma)) {
if (lba48)
tf->command = ATA_CMD_WRITE_EXT;
else
tf->command = ATA_CMD_WRITE;
tf->protocol = ATA_PROT_DMA_WRITE;
} else {
if (lba48)
tf->command = ATA_CMD_PIO_WRITE_EXT;
else
tf->command = ATA_CMD_PIO_WRITE;
tf->protocol = ATA_PROT_PIO_WRITE;
}
qc->flags |= ATA_QCFLAG_WRITE;
tf->command = qc->dev->write_cmd;
tf->flags |= ATA_TFLAG_WRITE;
VPRINTK("writing\n");
}
......@@ -351,7 +326,6 @@ void ata_scsi_rw_queue(struct ata_port *ap, struct ata_device *dev,
*
* LOCKING:
* spin_lock_irqsave(host_set lock)
* FIXME: kmap inside spin_lock_irqsave ok?
*
* RETURNS:
* Length of response buffer.
......@@ -366,7 +340,7 @@ static unsigned int ata_scsi_rbuf_get(struct scsi_cmnd *cmd, u8 **buf_out)
struct scatterlist *sg;
sg = (struct scatterlist *) cmd->request_buffer;
buf = kmap(sg->page) + sg->offset;
buf = kmap_atomic(sg->page, KM_USER0) + sg->offset;
buflen = sg->length;
} else {
buf = cmd->request_buffer;
......@@ -394,7 +368,7 @@ static inline void ata_scsi_rbuf_put(struct scsi_cmnd *cmd)
struct scatterlist *sg;
sg = (struct scatterlist *) cmd->request_buffer;
kunmap(sg->page);
kunmap_atomic(sg->page, KM_USER0);
}
}
......@@ -910,7 +884,7 @@ static void atapi_scsi_queuecmd(struct ata_port *ap, struct ata_device *dev,
qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
if (cmd->sc_data_direction == SCSI_DATA_WRITE) {
qc->flags |= ATA_QCFLAG_WRITE;
qc->tf.flags |= ATA_TFLAG_WRITE;
DPRINTK("direction: write\n");
}
......
drivers/scsi/sata_promise.c
View file @ b9a68924
......@@ -45,6 +45,7 @@ enum {
PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
PDC_TBG_MODE = 0x41, /* TBG mode */
PDC_FLASH_CTL = 0x44, /* Flash control register */
PDC_PCI_CTL = 0x48, /* PCI control and status register */
PDC_CTLSTAT = 0x60, /* IDE control and status register */
PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
PDC_SLEW_CTL = 0x470, /* slew rate control reg */
......@@ -77,6 +78,8 @@ enum {
board_20319 = 1, /* FastTrak S150 TX4 */
board_20621 = 2, /* FastTrak S150 SX4 */
PDC_HAS_PATA = (1 << 1), /* PDC20375 has PATA */
PDC_FLAG_20621 = (1 << 30), /* we have a 20621 */
PDC_HDMA_RESET = (1 << 11), /* HDMA reset */
......@@ -390,11 +393,10 @@ static inline unsigned int pdc_pkt_header(struct ata_taskfile *tf,
* and seq id (byte 2)
*/
switch (tf->protocol) {
case ATA_PROT_DMA_READ:
case ATA_PROT_DMA:
if (!(tf->flags & ATA_TFLAG_WRITE))
buf32[0] = cpu_to_le32(PDC_PKT_READ);
break;
case ATA_PROT_DMA_WRITE:
else
buf32[0] = 0;
break;
......@@ -554,7 +556,7 @@ static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf,
/*
* Set up ATA packet
*/
if (tf->protocol == ATA_PROT_DMA_READ)
if ((tf->protocol == ATA_PROT_DMA) && (!(tf->flags & ATA_TFLAG_WRITE)))
buf[i++] = PDC_PKT_READ;
else if (tf->protocol == ATA_PROT_NODATA)
buf[i++] = PDC_PKT_NODATA;
......@@ -606,7 +608,7 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf,
/*
* Set up Host DMA packet
*/
if (tf->protocol == ATA_PROT_DMA_READ)
if ((tf->protocol == ATA_PROT_DMA) && (!(tf->flags & ATA_TFLAG_WRITE)))
tmp = PDC_PKT_READ;
else
tmp = 0;
......@@ -768,7 +770,7 @@ static void pdc20621_dma_start(struct ata_queued_cmd *qc)
struct ata_host_set *host_set = ap->host_set;
unsigned int port_no = ap->port_no;
void *mmio = host_set->mmio_base;
unsigned int rw = (qc->flags & ATA_QCFLAG_WRITE);
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
u8 seq = (u8) (port_no + 1);
unsigned int doing_hdma = 0, port_ofs;
......@@ -821,8 +823,9 @@ static inline unsigned int pdc20621_host_intr( struct ata_port *ap,
VPRINTK("ENTER\n");
switch (qc->tf.protocol) {
case ATA_PROT_DMA_READ:
if ((qc->tf.protocol == ATA_PROT_DMA) && /* read */
(!(qc->tf.flags & ATA_TFLAG_WRITE))) {
/* step two - DMA from DIMM to host */
if (doing_hdma) {
VPRINTK("ata%u: read hdma, 0x%x 0x%x\n", ap->id,
......@@ -843,9 +846,9 @@ static inline unsigned int pdc20621_host_intr( struct ata_port *ap,
port_ofs + PDC_DIMM_HOST_PKT);
}
handled = 1;
break;
case ATA_PROT_DMA_WRITE:
} else if (qc->tf.protocol == ATA_PROT_DMA) { /* write */
/* step one - DMA from host to DIMM */
if (doing_hdma) {
u8 seq = (u8) (port_no + 1);
......@@ -868,18 +871,17 @@ static inline unsigned int pdc20621_host_intr( struct ata_port *ap,
pdc20621_pop_hdma(qc);
}
handled = 1;
break;
case ATA_PROT_NODATA: /* command completion, but no data xfer */
/* command completion, but no data xfer */
} else if (qc->tf.protocol == ATA_PROT_NODATA) {
status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
DPRINTK("BUS_NODATA (drv_stat 0x%X)\n", status);
ata_qc_complete(qc, status, 0);
handled = 1;
break;
default:
} else {
ap->stats.idle_irq++;
break;
}
return handled;
......@@ -999,8 +1001,7 @@ static void pdc_eng_timeout(struct ata_port *ap)
qc->scsidone = scsi_finish_command;
switch (qc->tf.protocol) {
case ATA_PROT_DMA_READ:
case ATA_PROT_DMA_WRITE:
case ATA_PROT_DMA:
printk(KERN_ERR "ata%u: DMA timeout\n", ap->id);
ata_qc_complete(ata_qc_from_tag(ap, ap->active_tag),
ata_wait_idle(ap) | ATA_ERR, 0);
......@@ -1036,8 +1037,7 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
unsigned int handled = 0;
switch (qc->tf.protocol) {
case ATA_PROT_DMA_READ:
case ATA_PROT_DMA_WRITE:
case ATA_PROT_DMA:
pdc_dma_complete(ap, qc);
handled = 1;
break;
......@@ -1130,16 +1130,14 @@ static void pdc_dma_start(struct ata_queued_cmd *qc)
static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
if ((tf->protocol != ATA_PROT_DMA_READ) &&
(tf->protocol != ATA_PROT_DMA_WRITE))
if (tf->protocol != ATA_PROT_DMA)
ata_tf_load_mmio(ap, tf);
}
static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
if ((tf->protocol != ATA_PROT_DMA_READ) &&
(tf->protocol != ATA_PROT_DMA_WRITE))
if (tf->protocol != ATA_PROT_DMA)
ata_exec_command_mmio(ap, tf);
}
......@@ -1604,13 +1602,21 @@ static void pdc_20621_init(struct ata_probe_ent *pe)
readl(mmio + PDC_HDMA_CTLSTAT); /* flush */
}
static int pdc_pata_possible(struct pci_dev *pdev)
{
if (pdev->device == 0x3375)
return 1;
return 0;
}
static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
{
struct pci_dev *pdev = pe->pdev;
void *mmio = pe->mmio_base;
u32 tmp;
if (chip_id == board_20621)
return;
BUG();
/* change FIFO_SHD to 8 dwords. Promise driver does this...
* dunno why.
......@@ -1638,6 +1644,14 @@ static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
writel(tmp, mmio + PDC_SLEW_CTL);
/* check for PATA port on PDC20375 */
if (pdc_pata_possible(pdev)) {
tmp = readl(mmio + PDC_PCI_CTL);
if (tmp & PDC_HAS_PATA)
printk(KERN_INFO DRV_NAME "(%s): sorry, PATA port not supported yet\n",
pci_name(pdev));
}
}
static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
......
drivers/scsi/sata_sis.c 0 → 100644
View file @ b9a68924
/*
* sata_sis.c - Silicon Integrated Systems SATA
*
* Copyright 2004 Uwe Koziolek
*
* The contents of this file are subject to the Open
* Software License version 1.1 that can be found at
* http://www.opensource.org/licenses/osl-1.1.txt and is included herein
* by reference.
*
* Alternatively, the contents of this file may be used under the terms
* of the GNU General Public License version 2 (the "GPL") as distributed
* in the kernel source COPYING file, in which case the provisions of
* the GPL are applicable instead of the above. If you wish to allow
* the use of your version of this file only under the terms of the
* GPL and not to allow others to use your version of this file under
* the OSL, indicate your decision by deleting the provisions above and
* replace them with the notice and other provisions required by the GPL.
* If you do not delete the provisions above, a recipient may use your
* version of this file under either the OSL or the GPL.
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include "scsi.h"
#include "hosts.h"
#include <linux/libata.h>
#define DRV_NAME "sata_sis"
#define DRV_VERSION "0.04"
enum {
sis_180 = 0,
};
static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg);
static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
static struct pci_device_id sis_pci_tbl[] = {
{ PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_180 },
{ } /* terminate list */
};
static struct pci_driver sis_pci_driver = {
.name = DRV_NAME,
.id_table = sis_pci_tbl,
.probe = sis_init_one,
.remove = ata_pci_remove_one,
};
static Scsi_Host_Template sis_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
.queuecommand = ata_scsi_queuecmd,
.eh_strategy_handler = ata_scsi_error,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = ATA_MAX_PRD,
.max_sectors = ATA_MAX_SECTORS,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
.bios_param = ata_std_bios_param,
};
static struct ata_port_operations sis_ops = {
.port_disable = ata_port_disable,
.tf_load = ata_tf_load_pio,
.tf_read = ata_tf_read_pio,
.check_status = ata_check_status_pio,
.exec_command = ata_exec_command_pio,
.phy_reset = sata_phy_reset,
.bmdma_start = ata_bmdma_start_pio,
.fill_sg = ata_fill_sg,
.eng_timeout = ata_eng_timeout,
.irq_handler = ata_interrupt,
.scr_read = sis_scr_read,
.scr_write = sis_scr_write,
.port_start = ata_port_start,
.port_stop = ata_port_stop,
};
MODULE_AUTHOR("Uwe Koziolek");
MODULE_DESCRIPTION("low-level driver for Silicon Integratad Systems SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg)
{
if (sc_reg >= 16)
return 0xffffffffU;
return inl(ap->ioaddr.scr_addr + (sc_reg * 4));
}
static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
{
if (sc_reg >= 16)
return;
outl(val, ap->ioaddr.scr_addr + (sc_reg * 4));
}
/* move to PCI layer, integrate w/ MSI stuff */
static void pci_enable_intx(struct pci_dev *pdev)
{
u16 pci_command;
pci_read_config_word(pdev, PCI_COMMAND, &pci_command);
if (pci_command & PCI_COMMAND_INTX_DISABLE) {
pci_command &= ~PCI_COMMAND_INTX_DISABLE;
pci_write_config_word(pdev, PCI_COMMAND, pci_command);
}
}
static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct ata_probe_ent *probe_ent = NULL;
int rc;
rc = pci_enable_device(pdev);
if (rc)
return rc;
rc = pci_request_regions(pdev, DRV_NAME);
if (rc)
goto err_out;
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
if (rc)
goto err_out_regions;
rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
if (rc)
goto err_out_regions;
probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
if (!probe_ent) {
rc = -ENOMEM;
goto err_out_regions;
}
memset(probe_ent, 0, sizeof(*probe_ent));
probe_ent->pdev = pdev;
INIT_LIST_HEAD(&probe_ent->node);
probe_ent->sht = &sis_sht;
probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
ATA_FLAG_NO_LEGACY;
probe_ent->pio_mask = 0x03;
probe_ent->udma_mask = 0x7f;
probe_ent->port_ops = &sis_ops;
probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0);
ata_std_ports(&probe_ent->port[0]);
probe_ent->port[0].ctl_addr =
pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4);
probe_ent->port[0].scr_addr = pci_resource_start(pdev, 5);
probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2);
ata_std_ports(&probe_ent->port[1]);
probe_ent->port[1].ctl_addr =
pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8;
probe_ent->port[1].scr_addr = pci_resource_start(pdev, 5) + 64;
probe_ent->n_ports = 2;
probe_ent->irq = pdev->irq;
probe_ent->irq_flags = SA_SHIRQ;
pci_set_master(pdev);
pci_enable_intx(pdev);
/* FIXME: check ata_device_add return value */
ata_device_add(probe_ent);
kfree(probe_ent);
return 0;
err_out_regions:
pci_release_regions(pdev);
err_out:
pci_disable_device(pdev);
return rc;
}
static int __init sis_init(void)
{
return pci_module_init(&sis_pci_driver);
}
static void __exit sis_exit(void)
{
pci_unregister_driver(&sis_pci_driver);
}
module_init(sis_init);
module_exit(sis_exit);
include/linux/ata.h
View file @ b9a68924
......@@ -102,16 +102,6 @@ enum {
ATA_REG_DEVSEL = ATA_REG_DEVICE,
ATA_REG_IRQ = ATA_REG_NSECT,
/* ATA taskfile protocols */
ATA_PROT_UNKNOWN = 0,
ATA_PROT_NODATA = 1,
ATA_PROT_PIO_READ = 2,
ATA_PROT_PIO_WRITE = 3,
ATA_PROT_DMA_READ = 4,
ATA_PROT_DMA_WRITE = 5,
ATA_PROT_ATAPI = 6,
ATA_PROT_ATAPI_DMA = 7,
/* ATA device commands */
ATA_CMD_EDD = 0x90, /* execute device diagnostic */
ATA_CMD_ID_ATA = 0xEC,
......@@ -156,14 +146,55 @@ enum {
SCR_CONTROL = 2,
SCR_ACTIVE = 3,
SCR_NOTIFICATION = 4,
/* struct ata_taskfile flags */
ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
};
enum ata_tf_protocols {
/* ATA taskfile protocols */
ATA_PROT_UNKNOWN, /* unknown/invalid */
ATA_PROT_NODATA, /* no data */
ATA_PROT_PIO, /* PIO single sector */
ATA_PROT_PIO_MULT, /* PIO multiple sector */
ATA_PROT_DMA, /* DMA */
ATA_PROT_ATAPI, /* packet command */
ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
};
/* core structures */
struct ata_prd {
u32 addr;
u32 flags_len;
} __attribute__((packed));
struct ata_taskfile {
unsigned long flags; /* ATA_TFLAG_xxx */
u8 protocol; /* ATA_PROT_xxx */
u8 ctl; /* control reg */
u8 hob_feature; /* additional data */
u8 hob_nsect; /* to support LBA48 */
u8 hob_lbal;
u8 hob_lbam;
u8 hob_lbah;
u8 feature;
u8 nsect;
u8 lbal;
u8 lbam;
u8 lbah;
u8 device;
u8 command; /* IO operation */
};
#define ata_id_is_ata(dev) (((dev)->id[0] & (1 << 15)) == 0)
#define ata_id_has_lba48(dev) ((dev)->id[83] & (1 << 10))
#define ata_id_has_lba(dev) ((dev)->id[49] & (1 << 8))
......
include/linux/libata.h
View file @ b9a68924
......@@ -107,12 +107,6 @@ enum {
ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */
ATA_FLAG_SATA_RESET = (1 << 7), /* use COMRESET */
/* struct ata_taskfile flags */
ATA_TFLAG_LBA48 = (1 << 0),
ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
ATA_QCFLAG_WRITE = (1 << 0), /* read==0, write==1 */
ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
ATA_QCFLAG_DMA = (1 << 2), /* data delivered via DMA */
ATA_QCFLAG_ATAPI = (1 << 3), /* is ATAPI packet command? */
......@@ -223,29 +217,6 @@ struct ata_host_set {
struct ata_port * ports[0];
};
struct ata_taskfile {
unsigned long flags; /* ATA_TFLAG_xxx */
u8 protocol; /* ATA_PROT_xxx */
u8 ctl; /* control reg */
u8 hob_feature; /* additional data */
u8 hob_nsect; /* to support LBA48 */
u8 hob_lbal;
u8 hob_lbam;
u8 hob_lbah;
u8 feature;
u8 nsect;
u8 lbal;
u8 lbam;
u8 lbah;
u8 device;
u8 command; /* IO operation */
};
struct ata_queued_cmd {
struct ata_port *ap;
struct ata_device *dev;
......@@ -293,6 +264,11 @@ struct ata_device {
* ATAPI7 spec size, 40 ASCII
* characters
*/
/* cache info about current transfer mode */
u8 xfer_protocol; /* taskfile xfer protocol */
u8 read_cmd; /* opcode to use on read */
u8 write_cmd; /* opcode to use on write */
};
struct ata_engine {
......
include/linux/pci_ids.h
View file @ b9a68924
......@@ -572,6 +572,7 @@
#define PCI_DEVICE_ID_SI_503 0x0008
#define PCI_DEVICE_ID_SI_ACPI 0x0009
#define PCI_DEVICE_ID_SI_LPC 0x0018
#define PCI_DEVICE_ID_SI_180 0x0180
#define PCI_DEVICE_ID_SI_5597_VGA 0x0200
#define PCI_DEVICE_ID_SI_6205 0x0205
#define PCI_DEVICE_ID_SI_501 0x0406
......
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