Commit ba6f7011 authored by Masahiro Yamada's avatar Masahiro Yamada

arm64: dts: uniphier: add input-delay properties to Cadence eMMC node

Since commit a89c472d ("mmc: sdhci-cadence: Update PHY delay
configuration"), PHY parameters must be specified by DT.

The hard-coded settings have been converted as follows:
- SDHCI_CDNS_PHY_DLY_SD_DEFAULT -> cdns,phy-input-delay-legacy
- SDHCI_CDNS_PHY_DLY_EMMC_SDR   -> cdns,phy-input-delay-mmc-highspeed
- SDHCI_CDNS_PHY_DLY_EMMC_DDR   -> cdns,phy-input-delay-mmc-ddr

The following have not been moved:
- SDHCI_CDNS_PHY_DLY_SD_HS
   this is unneeded in the eMMC configuration
- SDHCI_CDNS_PHY_DLY_EMMC_LEGACY
   this is never enabled by the driver as it is covered by
   SDHCI_CDNS_PHY_DLY_SD_DEFAULT
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 2ea659a9
...@@ -310,6 +310,9 @@ emmc: sdhc@5a000000 { ...@@ -310,6 +310,9 @@ emmc: sdhc@5a000000 {
bus-width = <8>; bus-width = <8>;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
cdns,phy-input-delay-legacy = <4>;
cdns,phy-input-delay-mmc-highspeed = <2>;
cdns,phy-input-delay-mmc-ddr = <3>;
}; };
usb0: usb@5a800100 { usb0: usb@5a800100 {
......
...@@ -384,6 +384,9 @@ emmc: sdhc@5a000000 { ...@@ -384,6 +384,9 @@ emmc: sdhc@5a000000 {
bus-width = <8>; bus-width = <8>;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
cdns,phy-input-delay-legacy = <4>;
cdns,phy-input-delay-mmc-highspeed = <2>;
cdns,phy-input-delay-mmc-ddr = <3>;
}; };
soc-glue@5f800000 { soc-glue@5f800000 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment