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Commit bb72f1f7 authored by Atsushi Nemoto's avatar Atsushi Nemoto Committed by Ralf Baechle
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[MIPS] TXx9: Random cleanup 

* Random cleanups spotted by checkpatch script.
* Do not initialize panic_timeout.  "panic=" kernel parameter can be used.
* Do not add "ip=any" or "ip=bootp".  This options is not board specific.
* Do not add "root=/dev/nfs".  This is default on CONFIG_ROOT_NFS.
* Kill unused error checking.
* Fix IRQ comment to match current code.
* Kill some unneeded includes
* ST0_ERL is already cleared in generic code.
* conswitchp is initialized generic code.
* __init is not needed in prototype.
Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c49f91f5
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Inline Side-by-side
Showing with 170 additions and 243 deletions
arch/mips/txx9/generic/smsc_fdc37m81x.c
View file @ bb72f1f7
...@@ -15,8 +15,6 @@ ...@@ -15,8 +15,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/txx9/smsc_fdc37m81x.h> #include <asm/txx9/smsc_fdc37m81x.h>
#define DEBUG
/* Common Registers */ /* Common Registers */
#define SMSC_FDC37M81X_CONFIG_INDEX 0x00 #define SMSC_FDC37M81X_CONFIG_INDEX 0x00
#define SMSC_FDC37M81X_CONFIG_DATA 0x01 #define SMSC_FDC37M81X_CONFIG_DATA 0x01
...@@ -55,7 +53,7 @@ ...@@ -55,7 +53,7 @@
#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
#define SMSC_FDC37M81X_CHIP_ID 0x4d #define SMSC_FDC37M81X_CHIP_ID 0x4d
static unsigned long g_smsc_fdc37m81x_base = 0; static unsigned long g_smsc_fdc37m81x_base;
static inline unsigned char smsc_fdc37m81x_rd(unsigned char index) static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)
{ {
...@@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) ...@@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
u8 chip_id; u8 chip_id;
if (g_smsc_fdc37m81x_base) if (g_smsc_fdc37m81x_base)
printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n", printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n",
__func__,
field, g_smsc_fdc37m81x_base); field, g_smsc_fdc37m81x_base);
g_smsc_fdc37m81x_base = port; g_smsc_fdc37m81x_base = port;
...@@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) ...@@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
if (chip_id == SMSC_FDC37M81X_CHIP_ID) if (chip_id == SMSC_FDC37M81X_CHIP_ID)
smsc_fdc37m81x_config_end(); smsc_fdc37m81x_config_end();
else { else {
printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n", printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__,
chip_id); chip_id);
g_smsc_fdc37m81x_base = 0; g_smsc_fdc37m81x_base = 0;
} }
...@@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) ...@@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port)
} }
#ifdef DEBUG #ifdef DEBUG
void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg) static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg)
{ {
printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg, printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n",
key, dev, reg,
smsc_fdc37m81x_rd(reg)); smsc_fdc37m81x_rd(reg));
} }
void smsc_fdc37m81x_config_dump(void) void smsc_fdc37m81x_config_dump(void)
{ {
u8 orig; u8 orig;
char *fname = "smsc_fdc37m81x_config_dump()"; const char *fname = __func__;
smsc_fdc37m81x_config_beg(); smsc_fdc37m81x_config_beg();
orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM); orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);
printk("%s: common\n", fname); printk(KERN_INFO "%s: common\n", fname);
smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
SMSC_FDC37M81X_DNUM); SMSC_FDC37M81X_DNUM);
smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
...@@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void) ...@@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void)
smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
SMSC_FDC37M81X_PMGT); SMSC_FDC37M81X_PMGT);
printk("%s: keyboard\n", fname); printk(KERN_INFO "%s: keyboard\n", fname);
smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD); smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);
smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD, smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
SMSC_FDC37M81X_ACTIVE); SMSC_FDC37M81X_ACTIVE);
......
arch/mips/txx9/jmr3927/irq.c
View file @ bb72f1f7
...@@ -30,15 +30,11 @@ ...@@ -30,15 +30,11 @@
* 675 Mass Ave, Cambridge, MA 02139, USA. * 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/sched.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/txx9/generic.h> #include <asm/txx9/generic.h>
#include <asm/txx9/jmr3927.h> #include <asm/txx9/jmr3927.h>
......
arch/mips/txx9/jmr3927/prom.c
View file @ bb72f1f7
...@@ -36,6 +36,7 @@ ...@@ -36,6 +36,7 @@
* 675 Mass Ave, Cambridge, MA 02139, USA. * 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
#include <linux/init.h> #include <linux/init.h>
#include <linux/kernel.h>
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/txx9/generic.h> #include <asm/txx9/generic.h>
#include <asm/txx9/jmr3927.h> #include <asm/txx9/jmr3927.h>
...@@ -56,20 +57,11 @@ prom_putchar(char c) ...@@ -56,20 +57,11 @@ prom_putchar(char c)
return; return;
} }
void
puts(const char *cp)
{
while (*cp)
prom_putchar(*cp++);
prom_putchar('\r');
prom_putchar('\n');
}
void __init jmr3927_prom_init(void) void __init jmr3927_prom_init(void)
{ {
/* CCFG */ /* CCFG */
if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
puts("Warning: TX3927 TLB off\n"); printk(KERN_ERR "TX3927 TLB off\n");
prom_init_cmdline(); prom_init_cmdline();
add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
......
arch/mips/txx9/jmr3927/setup.c
View file @ bb72f1f7
...@@ -74,9 +74,6 @@ static void __init jmr3927_mem_setup(void) ...@@ -74,9 +74,6 @@ static void __init jmr3927_mem_setup(void)
_machine_restart = jmr3927_machine_restart; _machine_restart = jmr3927_machine_restart;
/* Reboot on panic */
panic_timeout = 180;
/* cache setup */ /* cache setup */
{ {
unsigned int conf; unsigned int conf;
...@@ -94,7 +91,8 @@ static void __init jmr3927_mem_setup(void) ...@@ -94,7 +91,8 @@ static void __init jmr3927_mem_setup(void)
#endif #endif
conf = read_c0_conf(); conf = read_c0_conf();
conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON); conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE |
TX39_CONF_WBON | TX39_CONF_CWFON);
conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
conf |= mips_config_wbon ? TX39_CONF_WBON : 0; conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
...@@ -107,19 +105,11 @@ static void __init jmr3927_mem_setup(void) ...@@ -107,19 +105,11 @@ static void __init jmr3927_mem_setup(void)
/* initialize board */ /* initialize board */
jmr3927_board_init(); jmr3927_board_init();
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "ip=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " ip=bootp");
}
tx3927_setup_serial(1 << 1); /* ch1: noCTS */ tx3927_setup_serial(1 << 1); /* ch1: noCTS */
#ifdef CONFIG_SERIAL_TXX9_CONSOLE #ifdef CONFIG_SERIAL_TXX9_CONSOLE
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "console=")) == NULL) { if (!strstr(argptr, "console="))
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS1,115200"); strcat(argptr, " console=ttyS1,115200");
}
#endif #endif
} }
...@@ -199,16 +189,14 @@ static unsigned long jmr3927_swizzle_addr_b(unsigned long port) ...@@ -199,16 +189,14 @@ static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
#endif #endif
} }
static int __init jmr3927_rtc_init(void) static void __init jmr3927_rtc_init(void)
{ {
static struct resource __initdata res = { static struct resource __initdata res = {
.start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
.end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}; };
struct platform_device *dev; platform_device_register_simple("rtc-ds1742", -1, &res, 1);
dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
} }
static void __init jmr3927_device_init(void) static void __init jmr3927_device_init(void)
......
arch/mips/txx9/rbtx4927/irq.c
View file @ bb72f1f7
...@@ -27,85 +27,86 @@ ...@@ -27,85 +27,86 @@
* 675 Mass Ave, Cambridge, MA 02139, USA. * 675 Mass Ave, Cambridge, MA 02139, USA.
*/ */
/* /*
IRQ Device * I8259A_IRQ_BASE+00
00 RBTX4927-ISA/00 * I8259A_IRQ_BASE+01 PS2/Keyboard
01 RBTX4927-ISA/01 PS2/Keyboard * I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15)
02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15) * I8259A_IRQ_BASE+03
03 RBTX4927-ISA/03 * I8259A_IRQ_BASE+04
04 RBTX4927-ISA/04 * I8259A_IRQ_BASE+05
05 RBTX4927-ISA/05 * I8259A_IRQ_BASE+06
06 RBTX4927-ISA/06 * I8259A_IRQ_BASE+07
07 RBTX4927-ISA/07 * I8259A_IRQ_BASE+08
08 RBTX4927-ISA/08 * I8259A_IRQ_BASE+09
09 RBTX4927-ISA/09 * I8259A_IRQ_BASE+10
10 RBTX4927-ISA/10 * I8259A_IRQ_BASE+11
11 RBTX4927-ISA/11 * I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time)
12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time) * I8259A_IRQ_BASE+13
13 RBTX4927-ISA/13 * I8259A_IRQ_BASE+14 IDE
14 RBTX4927-ISA/14 IDE * I8259A_IRQ_BASE+15
15 RBTX4927-ISA/15 *
* MIPS_CPU_IRQ_BASE+00 Software 0
16 TX4927-CP0/00 Software 0 * MIPS_CPU_IRQ_BASE+01 Software 1
17 TX4927-CP0/01 Software 1 * MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0
18 TX4927-CP0/02 Cascade TX4927-CP0 * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
19 TX4927-CP0/03 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
20 TX4927-CP0/04 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
21 TX4927-CP0/05 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
22 TX4927-CP0/06 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+07 CPU TIMER
23 TX4927-CP0/07 CPU TIMER *
* TXX9_IRQ_BASE+00
24 TX4927-PIC/00 * TXX9_IRQ_BASE+01
25 TX4927-PIC/01 * TXX9_IRQ_BASE+02
26 TX4927-PIC/02 * TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC
27 TX4927-PIC/03 Cascade RBTX4927-IOC * TXX9_IRQ_BASE+04
28 TX4927-PIC/04 * TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet
29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet * TXX9_IRQ_BASE+06
30 TX4927-PIC/06 * TXX9_IRQ_BASE+07
31 TX4927-PIC/07 * TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0
32 TX4927-PIC/08 TX4927 SerialIO Channel 0 * TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1
33 TX4927-PIC/09 TX4927 SerialIO Channel 1 * TXX9_IRQ_BASE+10
34 TX4927-PIC/10 * TXX9_IRQ_BASE+11
35 TX4927-PIC/11 * TXX9_IRQ_BASE+12
36 TX4927-PIC/12 * TXX9_IRQ_BASE+13
37 TX4927-PIC/13 * TXX9_IRQ_BASE+14
38 TX4927-PIC/14 * TXX9_IRQ_BASE+15
39 TX4927-PIC/15 * TXX9_IRQ_BASE+16 TX4927 PCI PCI-C
40 TX4927-PIC/16 TX4927 PCI PCI-C * TXX9_IRQ_BASE+17
41 TX4927-PIC/17 * TXX9_IRQ_BASE+18
42 TX4927-PIC/18 * TXX9_IRQ_BASE+19
43 TX4927-PIC/19 * TXX9_IRQ_BASE+20
44 TX4927-PIC/20 * TXX9_IRQ_BASE+21
45 TX4927-PIC/21 * TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR
46 TX4927-PIC/22 TX4927 PCI PCI-ERR * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used)
47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used) * TXX9_IRQ_BASE+24
48 TX4927-PIC/24 * TXX9_IRQ_BASE+25
49 TX4927-PIC/25 * TXX9_IRQ_BASE+26
50 TX4927-PIC/26 * TXX9_IRQ_BASE+27
51 TX4927-PIC/27 * TXX9_IRQ_BASE+28
52 TX4927-PIC/28 * TXX9_IRQ_BASE+29
53 TX4927-PIC/29 * TXX9_IRQ_BASE+30
54 TX4927-PIC/30 * TXX9_IRQ_BASE+31
55 TX4927-PIC/31 *
* RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge)
56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4] * RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge)
57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5] * RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR)
58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported] * RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4)
59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6] * RBTX4927_IRQ_IOC+04
60 RBTX4927-IOC/04 * RBTX4927_IRQ_IOC+05
61 RBTX4927-IOC/05 * RBTX4927_IRQ_IOC+06
62 RBTX4927-IOC/06 * RBTX4927_IRQ_IOC+07
63 RBTX4927-IOC/07 *
* NOTES:
NOTES: * SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 * SouthBridge/ISA/pin=0 no pci irq used by this device
SouthBridge/ISA/pin=0 no pci irq used by this device * SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR
SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14 * via ISA IRQ14
SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 * SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
SouthBridge/PMC/pin=0 no pci irq used by this device * SouthBridge/PMC/pin=0 no pci irq used by this device
SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 * SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) * SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6 * JP7 is not bus master -- do NOT use -- only 4 pci bus master's
*/ * allowed -- SouthBridge, JP4, JP5, JP6
*/
#include <linux/init.h> #include <linux/init.h>
#include <linux/types.h> #include <linux/types.h>
...@@ -134,7 +135,7 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) ...@@ -134,7 +135,7 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
level3 = readb(rbtx4927_imstat_addr) & 0x1f; level3 = readb(rbtx4927_imstat_addr) & 0x1f;
if (level3) if (level3)
sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
return (sw_irq); return sw_irq;
} }
static void __init toshiba_rbtx4927_irq_ioc_init(void) static void __init toshiba_rbtx4927_irq_ioc_init(void)
......
arch/mips/txx9/rbtx4927/setup.c
View file @ bb72f1f7
...@@ -46,7 +46,6 @@ ...@@ -46,7 +46,6 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -189,9 +188,6 @@ static void __init rbtx4927_mem_setup(void) ...@@ -189,9 +188,6 @@ static void __init rbtx4927_mem_setup(void)
u32 cp0_config; u32 cp0_config;
char *argptr; char *argptr;
/* f/w leaves this on at startup */
clear_c0_status(ST0_ERL);
/* enable caches -- HCP5 does this, pmon does not */ /* enable caches -- HCP5 does this, pmon does not */
cp0_config = read_c0_config(); cp0_config = read_c0_config();
cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
...@@ -218,24 +214,9 @@ static void __init rbtx4927_mem_setup(void) ...@@ -218,24 +214,9 @@ static void __init rbtx4927_mem_setup(void)
tx4927_setup_serial(); tx4927_setup_serial();
#ifdef CONFIG_SERIAL_TXX9_CONSOLE #ifdef CONFIG_SERIAL_TXX9_CONSOLE
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if (strstr(argptr, "console=") == NULL) { if (!strstr(argptr, "console="))
strcat(argptr, " console=ttyS0,38400"); strcat(argptr, " console=ttyS0,38400");
}
#endif
#ifdef CONFIG_ROOT_NFS
argptr = prom_getcmdline();
if (strstr(argptr, "root=") == NULL) {
strcat(argptr, " root=/dev/nfs rw");
}
#endif
#ifdef CONFIG_IP_PNP
argptr = prom_getcmdline();
if (strstr(argptr, "ip=") == NULL) {
strcat(argptr, " ip=any");
}
#endif #endif
} }
...@@ -298,19 +279,17 @@ static void __init rbtx4927_time_init(void) ...@@ -298,19 +279,17 @@ static void __init rbtx4927_time_init(void)
tx4927_time_init(0); tx4927_time_init(0);
} }
static int __init toshiba_rbtx4927_rtc_init(void) static void __init toshiba_rbtx4927_rtc_init(void)
{ {
struct resource res = { struct resource res = {
.start = RBTX4927_BRAMRTC_BASE - IO_BASE, .start = RBTX4927_BRAMRTC_BASE - IO_BASE,
.end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1, .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}; };
struct platform_device *dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
platform_device_register_simple("rtc-ds1742", -1, &res, 1);
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
} }
static int __init rbtx4927_ne_init(void) static void __init rbtx4927_ne_init(void)
{ {
struct resource res[] = { struct resource res[] = {
{ {
...@@ -322,10 +301,7 @@ static int __init rbtx4927_ne_init(void) ...@@ -322,10 +301,7 @@ static int __init rbtx4927_ne_init(void)
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
} }
}; };
struct platform_device *dev = platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
platform_device_register_simple("ne", -1,
res, ARRAY_SIZE(res));
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
} }
static void __init rbtx4927_device_init(void) static void __init rbtx4927_device_init(void)
......
arch/mips/txx9/rbtx4938/irq.c
View file @ bb72f1f7
...@@ -11,59 +11,57 @@ ...@@ -11,59 +11,57 @@
*/ */
/* /*
IRQ Device * MIPS_CPU_IRQ_BASE+00 Software 0
* MIPS_CPU_IRQ_BASE+01 Software 1
16 TX4938-CP0/00 Software 0 * MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0
17 TX4938-CP0/01 Software 1 * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use
18 TX4938-CP0/02 Cascade TX4938-CP0 * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use
19 TX4938-CP0/03 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use
20 TX4938-CP0/04 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use
21 TX4938-CP0/05 Multiplexed -- do not use * MIPS_CPU_IRQ_BASE+07 CPU TIMER
22 TX4938-CP0/06 Multiplexed -- do not use *
23 TX4938-CP0/07 CPU TIMER * TXX9_IRQ_BASE+00
* TXX9_IRQ_BASE+01
24 TX4938-PIC/00 * TXX9_IRQ_BASE+02 Cascade RBTX4938-IOC
25 TX4938-PIC/01 * TXX9_IRQ_BASE+03 RBTX4938 RTL-8019AS Ethernet
26 TX4938-PIC/02 Cascade RBTX4938-IOC * TXX9_IRQ_BASE+04
27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet * TXX9_IRQ_BASE+05 TX4938 ETH1
28 TX4938-PIC/04 * TXX9_IRQ_BASE+06 TX4938 ETH0
29 TX4938-PIC/05 TX4938 ETH1 * TXX9_IRQ_BASE+07
30 TX4938-PIC/06 TX4938 ETH0 * TXX9_IRQ_BASE+08 TX4938 SIO 0
31 TX4938-PIC/07 * TXX9_IRQ_BASE+09 TX4938 SIO 1
32 TX4938-PIC/08 TX4938 SIO 0 * TXX9_IRQ_BASE+10 TX4938 DMA0
33 TX4938-PIC/09 TX4938 SIO 1 * TXX9_IRQ_BASE+11 TX4938 DMA1
34 TX4938-PIC/10 TX4938 DMA0 * TXX9_IRQ_BASE+12 TX4938 DMA2
35 TX4938-PIC/11 TX4938 DMA1 * TXX9_IRQ_BASE+13 TX4938 DMA3
36 TX4938-PIC/12 TX4938 DMA2 * TXX9_IRQ_BASE+14
37 TX4938-PIC/13 TX4938 DMA3 * TXX9_IRQ_BASE+15
38 TX4938-PIC/14 * TXX9_IRQ_BASE+16 TX4938 PCIC
39 TX4938-PIC/15 * TXX9_IRQ_BASE+17 TX4938 TMR0
40 TX4938-PIC/16 TX4938 PCIC * TXX9_IRQ_BASE+18 TX4938 TMR1
41 TX4938-PIC/17 TX4938 TMR0 * TXX9_IRQ_BASE+19 TX4938 TMR2
42 TX4938-PIC/18 TX4938 TMR1 * TXX9_IRQ_BASE+20
43 TX4938-PIC/19 TX4938 TMR2 * TXX9_IRQ_BASE+21
44 TX4938-PIC/20 * TXX9_IRQ_BASE+22 TX4938 PCIERR
45 TX4938-PIC/21 * TXX9_IRQ_BASE+23
46 TX4938-PIC/22 TX4938 PCIERR * TXX9_IRQ_BASE+24
47 TX4938-PIC/23 * TXX9_IRQ_BASE+25
48 TX4938-PIC/24 * TXX9_IRQ_BASE+26
49 TX4938-PIC/25 * TXX9_IRQ_BASE+27
50 TX4938-PIC/26 * TXX9_IRQ_BASE+28
51 TX4938-PIC/27 * TXX9_IRQ_BASE+29
52 TX4938-PIC/28 * TXX9_IRQ_BASE+30
53 TX4938-PIC/29 * TXX9_IRQ_BASE+31 TX4938 SPI
54 TX4938-PIC/30 *
55 TX4938-PIC/31 TX4938 SPI * RBTX4938_IRQ_IOC+00 PCI-D
* RBTX4938_IRQ_IOC+01 PCI-C
56 RBTX4938-IOC/00 PCI-D * RBTX4938_IRQ_IOC+02 PCI-B
57 RBTX4938-IOC/01 PCI-C * RBTX4938_IRQ_IOC+03 PCI-A
58 RBTX4938-IOC/02 PCI-B * RBTX4938_IRQ_IOC+04 RTC
59 RBTX4938-IOC/03 PCI-A * RBTX4938_IRQ_IOC+05 ATA
60 RBTX4938-IOC/04 RTC * RBTX4938_IRQ_IOC+06 MODEM
61 RBTX4938-IOC/05 ATA * RBTX4938_IRQ_IOC+07 SWINT
62 RBTX4938-IOC/06 MODEM */
63 RBTX4938-IOC/07 SWINT
*/
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
...@@ -93,9 +91,6 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) ...@@ -93,9 +91,6 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
return sw_irq; return sw_irq;
} }
/**********************************************************************************/
/* Functions for ioc */
/**********************************************************************************/
static void __init static void __init
toshiba_rbtx4938_irq_ioc_init(void) toshiba_rbtx4938_irq_ioc_init(void)
{ {
......
arch/mips/txx9/rbtx4938/setup.c
View file @ bb72f1f7
...@@ -13,8 +13,6 @@ ...@@ -13,8 +13,6 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/ioport.h> #include <linux/ioport.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/console.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/gpio.h> #include <linux/gpio.h>
...@@ -169,45 +167,29 @@ static void __init rbtx4938_mem_setup(void) ...@@ -169,45 +167,29 @@ static void __init rbtx4938_mem_setup(void)
tx4938_setup_serial(); tx4938_setup_serial();
#ifdef CONFIG_SERIAL_TXX9_CONSOLE #ifdef CONFIG_SERIAL_TXX9_CONSOLE
argptr = prom_getcmdline(); argptr = prom_getcmdline();
if (strstr(argptr, "console=") == NULL) { if (!strstr(argptr, "console="))
strcat(argptr, " console=ttyS0,38400"); strcat(argptr, " console=ttyS0,38400");
}
#endif #endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
printk("PIOSEL: disabling both ata and nand selection\n"); printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n");
local_irq_disable();
txx9_clear64(&tx4938_ccfgptr->pcfg, txx9_clear64(&tx4938_ccfgptr->pcfg,
TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
#endif #endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
printk("PIOSEL: enabling nand selection\n"); printk(KERN_INFO "PIOSEL: enabling nand selection\n");
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
#endif #endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
printk("PIOSEL: enabling ata selection\n"); printk(KERN_INFO "PIOSEL: enabling ata selection\n");
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
#endif #endif
#ifdef CONFIG_IP_PNP
argptr = prom_getcmdline();
if (strstr(argptr, "ip=") == NULL) {
strcat(argptr, " ip=any");
}
#endif
#ifdef CONFIG_FB
{
conswitchp = &dummy_con;
}
#endif
rbtx4938_spi_setup(); rbtx4938_spi_setup();
pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
/* fixup piosel */ /* fixup piosel */
...@@ -228,7 +210,7 @@ static void __init rbtx4938_mem_setup(void) ...@@ -228,7 +210,7 @@ static void __init rbtx4938_mem_setup(void)
rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY; rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource)) if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource))
printk("request resource for fpga failed\n"); printk(KERN_ERR "request resource for fpga failed\n");
_machine_restart = rbtx4938_machine_restart; _machine_restart = rbtx4938_machine_restart;
...@@ -238,7 +220,7 @@ static void __init rbtx4938_mem_setup(void) ...@@ -238,7 +220,7 @@ static void __init rbtx4938_mem_setup(void)
readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr)); readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
} }
static int __init rbtx4938_ne_init(void) static void __init rbtx4938_ne_init(void)
{ {
struct resource res[] = { struct resource res[] = {
{ {
...@@ -250,10 +232,7 @@ static int __init rbtx4938_ne_init(void) ...@@ -250,10 +232,7 @@ static int __init rbtx4938_ne_init(void)
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
} }
}; };
struct platform_device *dev = platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
platform_device_register_simple("ne", -1,
res, ARRAY_SIZE(res));
return IS_ERR(dev) ? PTR_ERR(dev) : 0;
} }
static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
......
include/asm-mips/txx9/smsc_fdc37m81x.h
View file @ bb72f1f7
...@@ -56,7 +56,7 @@ ...@@ -56,7 +56,7 @@
#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
#define SMSC_FDC37M81X_CHIP_ID 0x4d #define SMSC_FDC37M81X_CHIP_ID 0x4d
unsigned long __init smsc_fdc37m81x_init(unsigned long port); unsigned long smsc_fdc37m81x_init(unsigned long port);
void smsc_fdc37m81x_config_beg(void); void smsc_fdc37m81x_config_beg(void);
......
include/asm-mips/txx9/tx3927.h
View file @ bb72f1f7
...@@ -333,8 +333,8 @@ void tx3927_setup(void); ...@@ -333,8 +333,8 @@ void tx3927_setup(void);
void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr);
void tx3927_setup_serial(unsigned int cts_mask); void tx3927_setup_serial(unsigned int cts_mask);
struct pci_controller; struct pci_controller;
void __init tx3927_pcic_setup(struct pci_controller *channel, void tx3927_pcic_setup(struct pci_controller *channel,
unsigned long sdram_size, int extarb); unsigned long sdram_size, int extarb);
void tx3927_setup_pcierr_irq(void); void tx3927_setup_pcierr_irq(void);
void tx3927_irq_init(void); void tx3927_irq_init(void);
......
include/asm-mips/txx9/tx4927pcic.h
View file @ bb72f1f7
...@@ -193,8 +193,8 @@ struct tx4927_pcic_reg { ...@@ -193,8 +193,8 @@ struct tx4927_pcic_reg {
struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr( struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
struct pci_controller *channel); struct pci_controller *channel);
void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, void tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
struct pci_controller *channel, int extarb); struct pci_controller *channel, int extarb);
void tx4927_report_pcic_status(void); void tx4927_report_pcic_status(void);
char *tx4927_pcibios_setup(char *str); char *tx4927_pcibios_setup(char *str);
void tx4927_dump_pcic_settings(void); void tx4927_dump_pcic_settings(void);
......
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