Commit bccc2f7b authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Ingo Molnar

locking, powerpc: Annotate uic->lock as raw

uic->lock is protecting the interrupt controller hardware. This lock
can not be preempted on -rt.

In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Reported-by: default avatarDarcy L. Watkins <dwatkins@tranzeo.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 59d958d2
...@@ -47,7 +47,7 @@ struct uic { ...@@ -47,7 +47,7 @@ struct uic {
int index; int index;
int dcrbase; int dcrbase;
spinlock_t lock; raw_spinlock_t lock;
/* The remapper for this UIC */ /* The remapper for this UIC */
struct irq_host *irqhost; struct irq_host *irqhost;
...@@ -61,14 +61,14 @@ static void uic_unmask_irq(struct irq_data *d) ...@@ -61,14 +61,14 @@ static void uic_unmask_irq(struct irq_data *d)
u32 er, sr; u32 er, sr;
sr = 1 << (31-src); sr = 1 << (31-src);
spin_lock_irqsave(&uic->lock, flags); raw_spin_lock_irqsave(&uic->lock, flags);
/* ack level-triggered interrupts here */ /* ack level-triggered interrupts here */
if (irqd_is_level_type(d)) if (irqd_is_level_type(d))
mtdcr(uic->dcrbase + UIC_SR, sr); mtdcr(uic->dcrbase + UIC_SR, sr);
er = mfdcr(uic->dcrbase + UIC_ER); er = mfdcr(uic->dcrbase + UIC_ER);
er |= sr; er |= sr;
mtdcr(uic->dcrbase + UIC_ER, er); mtdcr(uic->dcrbase + UIC_ER, er);
spin_unlock_irqrestore(&uic->lock, flags); raw_spin_unlock_irqrestore(&uic->lock, flags);
} }
static void uic_mask_irq(struct irq_data *d) static void uic_mask_irq(struct irq_data *d)
...@@ -78,11 +78,11 @@ static void uic_mask_irq(struct irq_data *d) ...@@ -78,11 +78,11 @@ static void uic_mask_irq(struct irq_data *d)
unsigned long flags; unsigned long flags;
u32 er; u32 er;
spin_lock_irqsave(&uic->lock, flags); raw_spin_lock_irqsave(&uic->lock, flags);
er = mfdcr(uic->dcrbase + UIC_ER); er = mfdcr(uic->dcrbase + UIC_ER);
er &= ~(1 << (31 - src)); er &= ~(1 << (31 - src));
mtdcr(uic->dcrbase + UIC_ER, er); mtdcr(uic->dcrbase + UIC_ER, er);
spin_unlock_irqrestore(&uic->lock, flags); raw_spin_unlock_irqrestore(&uic->lock, flags);
} }
static void uic_ack_irq(struct irq_data *d) static void uic_ack_irq(struct irq_data *d)
...@@ -91,9 +91,9 @@ static void uic_ack_irq(struct irq_data *d) ...@@ -91,9 +91,9 @@ static void uic_ack_irq(struct irq_data *d)
unsigned int src = irqd_to_hwirq(d); unsigned int src = irqd_to_hwirq(d);
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&uic->lock, flags); raw_spin_lock_irqsave(&uic->lock, flags);
mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src)); mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
spin_unlock_irqrestore(&uic->lock, flags); raw_spin_unlock_irqrestore(&uic->lock, flags);
} }
static void uic_mask_ack_irq(struct irq_data *d) static void uic_mask_ack_irq(struct irq_data *d)
...@@ -104,7 +104,7 @@ static void uic_mask_ack_irq(struct irq_data *d) ...@@ -104,7 +104,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
u32 er, sr; u32 er, sr;
sr = 1 << (31-src); sr = 1 << (31-src);
spin_lock_irqsave(&uic->lock, flags); raw_spin_lock_irqsave(&uic->lock, flags);
er = mfdcr(uic->dcrbase + UIC_ER); er = mfdcr(uic->dcrbase + UIC_ER);
er &= ~sr; er &= ~sr;
mtdcr(uic->dcrbase + UIC_ER, er); mtdcr(uic->dcrbase + UIC_ER, er);
...@@ -118,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d) ...@@ -118,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
*/ */
if (!irqd_is_level_type(d)) if (!irqd_is_level_type(d))
mtdcr(uic->dcrbase + UIC_SR, sr); mtdcr(uic->dcrbase + UIC_SR, sr);
spin_unlock_irqrestore(&uic->lock, flags); raw_spin_unlock_irqrestore(&uic->lock, flags);
} }
static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
...@@ -152,7 +152,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) ...@@ -152,7 +152,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
mask = ~(1 << (31 - src)); mask = ~(1 << (31 - src));
spin_lock_irqsave(&uic->lock, flags); raw_spin_lock_irqsave(&uic->lock, flags);
tr = mfdcr(uic->dcrbase + UIC_TR); tr = mfdcr(uic->dcrbase + UIC_TR);
pr = mfdcr(uic->dcrbase + UIC_PR); pr = mfdcr(uic->dcrbase + UIC_PR);
tr = (tr & mask) | (trigger << (31-src)); tr = (tr & mask) | (trigger << (31-src));
...@@ -161,7 +161,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) ...@@ -161,7 +161,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
mtdcr(uic->dcrbase + UIC_PR, pr); mtdcr(uic->dcrbase + UIC_PR, pr);
mtdcr(uic->dcrbase + UIC_TR, tr); mtdcr(uic->dcrbase + UIC_TR, tr);
spin_unlock_irqrestore(&uic->lock, flags); raw_spin_unlock_irqrestore(&uic->lock, flags);
return 0; return 0;
} }
...@@ -254,7 +254,7 @@ static struct uic * __init uic_init_one(struct device_node *node) ...@@ -254,7 +254,7 @@ static struct uic * __init uic_init_one(struct device_node *node)
if (! uic) if (! uic)
return NULL; /* FIXME: panic? */ return NULL; /* FIXME: panic? */
spin_lock_init(&uic->lock); raw_spin_lock_init(&uic->lock);
indexp = of_get_property(node, "cell-index", &len); indexp = of_get_property(node, "cell-index", &len);
if (!indexp || (len != sizeof(u32))) { if (!indexp || (len != sizeof(u32))) {
printk(KERN_ERR "uic: Device node %s has missing or invalid " printk(KERN_ERR "uic: Device node %s has missing or invalid "
......
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