Commit bdb3489c authored by yipechai's avatar yipechai Committed by Alex Deucher

drm/amdgpu: Optimize xxx_ras_late_init/xxx_ras_late_fini for each ras block

1. Define amdgpu_ras_block_late_init to create sysfs nodes
   and interrupt handles.
2. Define amdgpu_ras_block_late_fini to remove sysfs nodes
   and interrupt handles.
3. Replace ras block variable members in struct
   amdgpu_ras_block_object with struct ras_common_if, which
   can make it easy to associate each ras block instance
   with each ras block functional interface.
4. Add .ras_cb to struct amdgpu_ras_block_object.
5. Change each ras block to fit for the changement of struct
   amdgpu_ras_block_object.
Signed-off-by: default avataryipechai <YiPeng.Chai@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 22b1df28
...@@ -83,14 +83,15 @@ int amdgpu_mca_ras_late_init(struct amdgpu_device *adev, ...@@ -83,14 +83,15 @@ int amdgpu_mca_ras_late_init(struct amdgpu_device *adev,
.sysfs_name = sysfs_name, .sysfs_name = sysfs_name,
}; };
snprintf(sysfs_name, sizeof(sysfs_name), "%s_err_count", mca_dev->ras->ras_block.name); snprintf(sysfs_name, sizeof(sysfs_name), "%s_err_count",
mca_dev->ras->ras_block.ras_comm.name);
if (!mca_dev->ras_if) { if (!mca_dev->ras_if) {
mca_dev->ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); mca_dev->ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
if (!mca_dev->ras_if) if (!mca_dev->ras_if)
return -ENOMEM; return -ENOMEM;
mca_dev->ras_if->block = mca_dev->ras->ras_block.block; mca_dev->ras_if->block = mca_dev->ras->ras_block.ras_comm.block;
mca_dev->ras_if->sub_block_index = mca_dev->ras->ras_block.sub_block_index; mca_dev->ras_if->sub_block_index = mca_dev->ras->ras_block.ras_comm.sub_block_index;
mca_dev->ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; mca_dev->ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
} }
ih_info.head = fs_info.head = *mca_dev->ras_if; ih_info.head = fs_info.head = *mca_dev->ras_if;
......
...@@ -877,7 +877,7 @@ static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_ ...@@ -877,7 +877,7 @@ static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object *block_
if (!block_obj) if (!block_obj)
return -EINVAL; return -EINVAL;
if (block_obj->block == block) if (block_obj->ras_comm.block == block)
return 0; return 0;
return -EINVAL; return -EINVAL;
...@@ -2457,6 +2457,23 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev, ...@@ -2457,6 +2457,23 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev,
return r; return r;
} }
int amdgpu_ras_block_late_init(struct amdgpu_device *adev,
struct ras_common_if *ras_block)
{
char sysfs_name[32];
struct ras_ih_if ih_info;
struct ras_fs_if fs_info;
struct amdgpu_ras_block_object *obj;
obj = container_of(ras_block, struct amdgpu_ras_block_object, ras_comm);
ih_info.cb = obj->ras_cb;
ih_info.head = *ras_block;
snprintf(sysfs_name, sizeof(sysfs_name), "%s_err_count", ras_block->name);
fs_info.sysfs_name = (const char *)sysfs_name;
fs_info.head = *ras_block;
return amdgpu_ras_late_init(adev, ras_block, &fs_info, &ih_info);
}
/* helper function to remove ras fs node and interrupt handler */ /* helper function to remove ras fs node and interrupt handler */
void amdgpu_ras_late_fini(struct amdgpu_device *adev, void amdgpu_ras_late_fini(struct amdgpu_device *adev,
struct ras_common_if *ras_block, struct ras_common_if *ras_block,
...@@ -2470,6 +2487,22 @@ void amdgpu_ras_late_fini(struct amdgpu_device *adev, ...@@ -2470,6 +2487,22 @@ void amdgpu_ras_late_fini(struct amdgpu_device *adev,
amdgpu_ras_interrupt_remove_handler(adev, ih_info); amdgpu_ras_interrupt_remove_handler(adev, ih_info);
} }
void amdgpu_ras_block_late_fini(struct amdgpu_device *adev,
struct ras_common_if *ras_block)
{
struct ras_ih_if ih_info;
struct amdgpu_ras_block_object *obj;
if (!ras_block)
return;
obj = container_of(ras_block, struct amdgpu_ras_block_object, ras_comm);
ih_info.head = *ras_block;
ih_info.cb = obj->ras_cb;
amdgpu_ras_late_fini(adev, ras_block, &ih_info);
}
/* do some init work after IP late init as dependence. /* do some init work after IP late init as dependence.
* and it runs in resume/gpu reset/booting up cases. * and it runs in resume/gpu reset/booting up cases.
*/ */
......
...@@ -486,17 +486,13 @@ struct ras_debug_if { ...@@ -486,17 +486,13 @@ struct ras_debug_if {
}; };
struct amdgpu_ras_block_object { struct amdgpu_ras_block_object {
/* block name */ struct ras_common_if ras_comm;
char name[32];
enum amdgpu_ras_block block;
uint32_t sub_block_index;
int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj, int (*ras_block_match)(struct amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block, uint32_t sub_block_index); enum amdgpu_ras_block block, uint32_t sub_block_index);
int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info); int (*ras_late_init)(struct amdgpu_device *adev, void *ras_info);
void (*ras_fini)(struct amdgpu_device *adev); void (*ras_fini)(struct amdgpu_device *adev);
ras_ih_cb ras_cb;
const struct amdgpu_ras_block_hw_ops *hw_ops; const struct amdgpu_ras_block_hw_ops *hw_ops;
}; };
...@@ -605,10 +601,17 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev, ...@@ -605,10 +601,17 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev,
struct ras_common_if *ras_block, struct ras_common_if *ras_block,
struct ras_fs_if *fs_info, struct ras_fs_if *fs_info,
struct ras_ih_if *ih_info); struct ras_ih_if *ih_info);
int amdgpu_ras_block_late_init(struct amdgpu_device *adev,
struct ras_common_if *ras_block);
void amdgpu_ras_late_fini(struct amdgpu_device *adev, void amdgpu_ras_late_fini(struct amdgpu_device *adev,
struct ras_common_if *ras_block, struct ras_common_if *ras_block,
struct ras_ih_if *ih_info); struct ras_ih_if *ih_info);
void amdgpu_ras_block_late_fini(struct amdgpu_device *adev,
struct ras_common_if *ras_block);
int amdgpu_ras_feature_enable(struct amdgpu_device *adev, int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
struct ras_common_if *head, bool enable); struct ras_common_if *head, bool enable);
......
...@@ -981,8 +981,10 @@ struct amdgpu_ras_block_hw_ops xgmi_ras_hw_ops = { ...@@ -981,8 +981,10 @@ struct amdgpu_ras_block_hw_ops xgmi_ras_hw_ops = {
struct amdgpu_xgmi_ras xgmi_ras = { struct amdgpu_xgmi_ras xgmi_ras = {
.ras_block = { .ras_block = {
.name = "xgmi", .ras_comm = {
.block = AMDGPU_RAS_BLOCK__XGMI_WAFL, .name = "xgmi",
.block = AMDGPU_RAS_BLOCK__XGMI_WAFL,
},
.hw_ops = &xgmi_ras_hw_ops, .hw_ops = &xgmi_ras_hw_ops,
.ras_late_init = amdgpu_xgmi_ras_late_init, .ras_late_init = amdgpu_xgmi_ras_late_init,
.ras_fini = amdgpu_xgmi_ras_fini, .ras_fini = amdgpu_xgmi_ras_fini,
......
...@@ -2195,8 +2195,8 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) ...@@ -2195,8 +2195,8 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
return err; return err;
} }
strcpy(adev->gfx.ras->ras_block.name,"gfx"); strcpy(adev->gfx.ras->ras_block.ras_comm.name, "gfx");
adev->gfx.ras->ras_block.block = AMDGPU_RAS_BLOCK__GFX; adev->gfx.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX;
/* If not define special ras_late_init function, use gfx default ras_late_init */ /* If not define special ras_late_init function, use gfx default ras_late_init */
if (!adev->gfx.ras->ras_block.ras_late_init) if (!adev->gfx.ras->ras_block.ras_late_init)
......
...@@ -672,8 +672,8 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device *adev) ...@@ -672,8 +672,8 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device *adev)
if (adev->umc.ras) { if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block);
strcpy(adev->umc.ras->ras_block.name, "umc"); strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC; adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default ras_late_init */ /* If don't define special ras_late_init function, use default ras_late_init */
if (!adev->umc.ras->ras_block.ras_late_init) if (!adev->umc.ras->ras_block.ras_late_init)
......
...@@ -1232,8 +1232,8 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev) ...@@ -1232,8 +1232,8 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
if (adev->umc.ras) { if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block); amdgpu_ras_register_ras_block(adev, &adev->umc.ras->ras_block);
strcpy(adev->umc.ras->ras_block.name, "umc"); strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC; adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default ras_late_init */ /* If don't define special ras_late_init function, use default ras_late_init */
if (!adev->umc.ras->ras_block.ras_late_init) if (!adev->umc.ras->ras_block.ras_late_init)
...@@ -1280,8 +1280,8 @@ static void gmc_v9_0_set_mmhub_ras_funcs(struct amdgpu_device *adev) ...@@ -1280,8 +1280,8 @@ static void gmc_v9_0_set_mmhub_ras_funcs(struct amdgpu_device *adev)
if (adev->mmhub.ras) { if (adev->mmhub.ras) {
amdgpu_ras_register_ras_block(adev, &adev->mmhub.ras->ras_block); amdgpu_ras_register_ras_block(adev, &adev->mmhub.ras->ras_block);
strcpy(adev->mmhub.ras->ras_block.name,"mmhub"); strcpy(adev->mmhub.ras->ras_block.ras_comm.name, "mmhub");
adev->mmhub.ras->ras_block.block = AMDGPU_RAS_BLOCK__MMHUB; adev->mmhub.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB;
/* If don't define special ras_late_init function, use default ras_late_init */ /* If don't define special ras_late_init function, use default ras_late_init */
if (!adev->mmhub.ras->ras_block.ras_late_init) if (!adev->mmhub.ras->ras_block.ras_late_init)
......
...@@ -157,8 +157,10 @@ struct amdgpu_ras_block_hw_ops hdp_v4_0_ras_hw_ops = { ...@@ -157,8 +157,10 @@ struct amdgpu_ras_block_hw_ops hdp_v4_0_ras_hw_ops = {
struct amdgpu_hdp_ras hdp_v4_0_ras = { struct amdgpu_hdp_ras hdp_v4_0_ras = {
.ras_block = { .ras_block = {
.name = "hdp", .ras_comm = {
.block = AMDGPU_RAS_BLOCK__HDP, .name = "hdp",
.block = AMDGPU_RAS_BLOCK__HDP,
},
.hw_ops = &hdp_v4_0_ras_hw_ops, .hw_ops = &hdp_v4_0_ras_hw_ops,
.ras_late_init = amdgpu_hdp_ras_late_init, .ras_late_init = amdgpu_hdp_ras_late_init,
.ras_fini = amdgpu_hdp_ras_fini, .ras_fini = amdgpu_hdp_ras_fini,
......
...@@ -53,8 +53,8 @@ static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj, ...@@ -53,8 +53,8 @@ static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
if (!block_obj) if (!block_obj)
return -EINVAL; return -EINVAL;
if ((block_obj->block == block) && if ((block_obj->ras_comm.block == block) &&
(block_obj->sub_block_index == sub_block_index)) { (block_obj->ras_comm.sub_block_index == sub_block_index)) {
return 0; return 0;
} }
...@@ -68,9 +68,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = { ...@@ -68,9 +68,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = {
struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = { struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
.ras_block = { .ras_block = {
.block = AMDGPU_RAS_BLOCK__MCA, .ras_comm = {
.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, .block = AMDGPU_RAS_BLOCK__MCA,
.name = "mp0", .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0,
.name = "mp0",
},
.hw_ops = &mca_v3_0_mp0_hw_ops, .hw_ops = &mca_v3_0_mp0_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match, .ras_block_match = mca_v3_0_ras_block_match,
.ras_late_init = mca_v3_0_mp0_ras_late_init, .ras_late_init = mca_v3_0_mp0_ras_late_init,
...@@ -103,9 +105,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = { ...@@ -103,9 +105,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = {
struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = { struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
.ras_block = { .ras_block = {
.block = AMDGPU_RAS_BLOCK__MCA, .ras_comm = {
.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, .block = AMDGPU_RAS_BLOCK__MCA,
.name = "mp1", .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1,
.name = "mp1",
},
.hw_ops = &mca_v3_0_mp1_hw_ops, .hw_ops = &mca_v3_0_mp1_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match, .ras_block_match = mca_v3_0_ras_block_match,
.ras_late_init = mca_v3_0_mp1_ras_late_init, .ras_late_init = mca_v3_0_mp1_ras_late_init,
...@@ -138,9 +142,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = { ...@@ -138,9 +142,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = {
struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = { struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
.ras_block = { .ras_block = {
.block = AMDGPU_RAS_BLOCK__MCA, .ras_comm = {
.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, .block = AMDGPU_RAS_BLOCK__MCA,
.name = "mpio", .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO,
.name = "mpio",
},
.hw_ops = &mca_v3_0_mpio_hw_ops, .hw_ops = &mca_v3_0_mpio_hw_ops,
.ras_block_match = mca_v3_0_ras_block_match, .ras_block_match = mca_v3_0_ras_block_match,
.ras_late_init = mca_v3_0_mpio_ras_late_init, .ras_late_init = mca_v3_0_mpio_ras_late_init,
......
...@@ -664,8 +664,10 @@ const struct amdgpu_ras_block_hw_ops nbio_v7_4_ras_hw_ops = { ...@@ -664,8 +664,10 @@ const struct amdgpu_ras_block_hw_ops nbio_v7_4_ras_hw_ops = {
struct amdgpu_nbio_ras nbio_v7_4_ras = { struct amdgpu_nbio_ras nbio_v7_4_ras = {
.ras_block = { .ras_block = {
.name = "pcie_bif", .ras_comm = {
.block = AMDGPU_RAS_BLOCK__PCIE_BIF, .name = "pcie_bif",
.block = AMDGPU_RAS_BLOCK__PCIE_BIF,
},
.hw_ops = &nbio_v7_4_ras_hw_ops, .hw_ops = &nbio_v7_4_ras_hw_ops,
.ras_late_init = amdgpu_nbio_ras_late_init, .ras_late_init = amdgpu_nbio_ras_late_init,
.ras_fini = amdgpu_nbio_ras_fini, .ras_fini = amdgpu_nbio_ras_fini,
......
...@@ -2822,8 +2822,8 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device *adev) ...@@ -2822,8 +2822,8 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device *adev)
if (adev->sdma.ras) { if (adev->sdma.ras) {
amdgpu_ras_register_ras_block(adev, &adev->sdma.ras->ras_block); amdgpu_ras_register_ras_block(adev, &adev->sdma.ras->ras_block);
strcpy(adev->sdma.ras->ras_block.name, "sdma"); strcpy(adev->sdma.ras->ras_block.ras_comm.name, "sdma");
adev->sdma.ras->ras_block.block = AMDGPU_RAS_BLOCK__SDMA; adev->sdma.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA;
/* If don't define special ras_late_init function, use default ras_late_init */ /* If don't define special ras_late_init function, use default ras_late_init */
if (!adev->sdma.ras->ras_block.ras_late_init) if (!adev->sdma.ras->ras_block.ras_late_init)
......
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