Commit bea8bffc authored by Felix Fietkau's avatar Felix Fietkau Committed by Greg Kroah-Hartman

ath9k_hw: fix chain swap setting when setting rx chainmask to 5

commit 959f049d upstream.

commit 24171dd9 upstream.

Chain swapping should only be enabled when the EEPROM chainmask is set to 5,
regardless of what the runtime chainmask is.
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
[bwh: Backported to 3.2: keep the special case for AR_SREV_9462 here]
Signed-off-by: default avatarBen Hutchings <ben@decadent.org.uk>
Cc: Jianguo Wu <wujianguo@huawei.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent aa7640d0
...@@ -545,33 +545,20 @@ static void ar9003_hw_init_bb(struct ath_hw *ah, ...@@ -545,33 +545,20 @@ static void ar9003_hw_init_bb(struct ath_hw *ah,
void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
{ {
switch (rx) { if (ah->caps.tx_chainmask == 5 || ah->caps.rx_chainmask == 5)
case 0x5:
REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
AR_PHY_SWAP_ALT_CHAIN); AR_PHY_SWAP_ALT_CHAIN);
case 0x3:
case 0x1: REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
case 0x2: REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
case 0x7:
REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
break;
default:
break;
}
if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7)) if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
REG_WRITE(ah, AR_SELFGEN_MASK, 0x3); tx = 3;
else if (AR_SREV_9462(ah)) else if (AR_SREV_9462(ah))
/* xxx only when MCI support is enabled */ /* xxx only when MCI support is enabled */
REG_WRITE(ah, AR_SELFGEN_MASK, 0x3); tx = 3;
else
REG_WRITE(ah, AR_SELFGEN_MASK, tx);
if (tx == 0x5) { REG_WRITE(ah, AR_SELFGEN_MASK, tx);
REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
AR_PHY_SWAP_ALT_CHAIN);
}
} }
/* /*
......
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