Commit bfb4d184 authored by Kai Germaschewski's avatar Kai Germaschewski

ISDN/HiSax: Clean up the various IPAC IRQ handlers

Just renaming and introducing some helpers makes them look very similar
to each other..
parent 14dad372
......@@ -116,13 +116,13 @@ static struct dc_hw_ops isac_ops = {
static u8
ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{
return readreg(cs, cs->hw.asus.isac, offset|0x80);
return readreg(cs, cs->hw.asus.isac, offset+0x80);
}
static void
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs, cs->hw.asus.isac, offset|0x80, value);
writereg(cs, cs->hw.asus.isac, offset+0x80, value);
}
static void
......@@ -175,17 +175,26 @@ static struct bc_hw_ops hscx_ops = {
.write_fifo = hscx_write_fifo,
};
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
return ipac_dc_read(cs, offset - 0x80);
}
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
ipac_dc_write(cs, offset - 0x80, value);
}
static void
asuscom_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u8 ista, val, icnt = 5;
if (!cs) {
printk(KERN_WARNING "ISDNLink: Spurious interrupt!\n");
return;
}
ista = readreg(cs, cs->hw.asus.isac, IPAC_ISTA);
spin_lock(&cs->lock);
ista = ipac_read(cs, IPAC_ISTA);
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
......@@ -210,15 +219,17 @@ asuscom_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs, cs->hw.asus.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPAC;
}
if (!icnt)
printk(KERN_WARNING "ASUS IRQ LOOP\n");
writereg(cs, cs->hw.asus.isac, IPAC_MASK, 0xFF);
writereg(cs, cs->hw.asus.isac, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
spin_unlock(&cs->lock);
}
static void
......
......@@ -87,13 +87,13 @@ writefifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
static u8
ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{
return readreg(cs, offset | 0x80);
return readreg(cs, offset + 0x80);
}
static void
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs, offset | 0x80, value);
writereg(cs, offset + 0x80, value);
}
static void
......@@ -146,6 +146,18 @@ static struct bc_hw_ops hscx_ops = {
.write_fifo = hscx_write_fifo,
};
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
return ipac_dc_read(cs, offset - 0x80);
}
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
ipac_dc_write(cs, offset - 0x80, value);
}
/* Set the specific ipac to active */
static void
set_ipac_active(struct IsdnCardState *cs, u_int active)
......@@ -161,7 +173,7 @@ bkm_a8_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 ista, val, icnt = 5;
spin_lock(&cs->lock);
ista = readreg(cs, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if (!(ista & 0x3f)) /* not this IPAC */
goto unlock;
Start_IPAC:
......@@ -189,7 +201,7 @@ bkm_a8_interrupt(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPAC;
......@@ -198,8 +210,8 @@ bkm_a8_interrupt(int intno, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "HiSax: %s (%s) IRQ LOOP\n",
CardType[cs->typ],
sct_quadro_subtypes[cs->subtyp]);
writereg(cs, IPAC_MASK, 0xFF);
writereg(cs, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
unlock:
spin_unlock(&cs->lock);
}
......
......@@ -172,7 +172,7 @@ ipac_dc_read(struct IsdnCardState *cs, u8 offset)
static void
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value);
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80, value);
}
static void
......@@ -364,28 +364,26 @@ static void
diva_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u8 val, sval;
u8 sval;
int cnt=5;
spin_lock(&cs->lock);
while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {
val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40);
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA);
if (val)
isac_interrupt(cs, val);
cnt--;
hscxisac_irq(intno, dev_id, regs);
}
if (!cnt)
printk(KERN_WARNING "Diva: IRQ LOOP\n");
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0xFF);
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0x0);
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0);
writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0);
spin_unlock(&cs->lock);
}
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
return ipac_dc_read(cs, offset - 0x80);
}
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
ipac_dc_write(cs, offset - 0x80, value);
}
static void
......@@ -399,12 +397,12 @@ diva_ipac_isa_irq(int intno, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "Diva: Spurious interrupt!\n");
return;
}
ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
Start_IPACISA:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -415,7 +413,7 @@ diva_ipac_isa_irq(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val);
}
if (ista & 0x20) {
val = 0xfe & readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA + 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......@@ -424,15 +422,28 @@ diva_ipac_isa_irq(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPACISA;
}
if (!icnt)
printk(KERN_WARNING "DIVA IPAC IRQ LOOP\n");
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xFF);
writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
}
static u8
mem_ipac_read(struct IsdnCardState *cs, u8 offset)
{
return mem_ipac_dc_read(cs, offset - 0x80);
}
static void
mem_ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
mem_ipac_dc_write(cs, offset - 0x80, value);
}
static void
......@@ -441,23 +452,17 @@ diva_ipac_pci_irq(int intno, void *dev_id, struct pt_regs *regs)
struct IsdnCardState *cs = dev_id;
u8 ista,val;
int icnt=5;
u8 *cfg;
if (!cs) {
printk(KERN_WARNING "Diva: Spurious interrupt!\n");
return;
}
cfg = (u8 *) cs->hw.diva.pci_cfg;
val = *cfg;
val = readb(cs->hw.diva.pci_cfg);
if (!(val & PITA_INT0_STATUS))
return; /* other shared IRQ */
*cfg = PITA_INT0_STATUS; /* Reset pending INT0 */
ista = memreadreg(cs->hw.diva.cfg_reg, IPAC_ISTA);
writeb(PITA_INT0_STATUS, cs->hw.diva.pci_cfg); /* Reset pending INT0 */
ista = mem_ipac_read(cs, IPAC_ISTA);
Start_IPACPCI:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = memreadreg(cs->hw.diva.cfg_reg, HSCX_ISTA + 0x40);
val = mem_hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -468,7 +473,7 @@ diva_ipac_pci_irq(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val);
}
if (ista & 0x20) {
val = 0xfe & memreadreg(cs->hw.diva.cfg_reg, ISAC_ISTA + 0x80);
val = mem_ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......@@ -477,15 +482,15 @@ diva_ipac_pci_irq(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = memreadreg(cs->hw.diva.cfg_reg, IPAC_ISTA);
ista = mem_ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPACPCI;
}
if (!icnt)
printk(KERN_WARNING "DIVA IPAC PCI IRQ LOOP\n");
memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xFF);
memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xC0);
mem_ipac_write(cs, IPAC_MASK, 0xFF);
mem_ipac_write(cs, IPAC_MASK, 0xC0);
}
static void
......@@ -493,17 +498,11 @@ diva_ipacx_pci_irq(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u8 val;
u8 *cfg;
if (!cs) {
printk(KERN_WARNING "Diva: Spurious interrupt!\n");
return;
}
cfg = (u8 *) cs->hw.diva.pci_cfg;
val = *cfg;
val = readb(cs->hw.diva.pci_cfg);
if (!(val &PITA_INT0_STATUS)) return; // other shared IRQ
interrupt_ipacx(cs); // handler for chip
*cfg = PITA_INT0_STATUS; // Reset PLX interrupt
writeb(PITA_INT0_STATUS, cs->hw.diva.pci_cfg); // Reset PLX interrupt
}
static void
......@@ -959,11 +958,11 @@ setup_diva(struct IsdnCard *card)
request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn");
}
}
cs->bc_hw_ops = &hscx_ops;
cs->cardmsg = &Diva_card_msg;
if (cs->subtyp == DIVA_IPAC_ISA) {
diva_ipac_isa_reset(cs);
cs->dc_hw_ops = &ipac_dc_ops;
cs->bc_hw_ops = &hscx_ops;
cs->card_ops = &diva_ipac_isa_ops;
val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ID);
printk(KERN_INFO "Diva: IPAC version %x\n", val);
......@@ -987,6 +986,7 @@ setup_diva(struct IsdnCard *card)
cs->hw.diva.tl.data = (long) cs;
init_timer(&cs->hw.diva.tl);
cs->dc_hw_ops = &isac_ops;
cs->bc_hw_ops = &hscx_ops;
cs->card_ops = &diva_ops;
ISACVersion(cs, "Diva:");
if (HscxVersion(cs, "Diva:")) {
......
......@@ -220,7 +220,7 @@ ipac_dc_read(struct IsdnCardState *cs, u8 offset)
static void
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs, cs->hw.elsa.isac, offset|0x80, value);
writereg(cs, cs->hw.elsa.isac, offset+0x80, value);
}
static void
......@@ -356,6 +356,18 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
byteout(cs->hw.elsa.trig, 0x00);
}
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
return ipac_dc_read(cs, offset - 0x80);
}
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
ipac_dc_write(cs, offset - 0x80, value);
}
static void
elsa_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
{
......@@ -382,7 +394,7 @@ elsa_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
}
}
#endif
ista = readreg(cs, cs->hw.elsa.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
......@@ -407,15 +419,15 @@ elsa_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs, cs->hw.elsa.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPAC;
}
if (!icnt)
printk(KERN_WARNING "ELSA IRQ LOOP\n");
writereg(cs, cs->hw.elsa.isac, IPAC_MASK, 0xFF);
writereg(cs, cs->hw.elsa.isac, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
}
static void
......
......@@ -252,34 +252,19 @@ static struct bc_hw_ops hscx_ops = {
.write_fifo = hscx_write_fifo,
};
static void
gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
#define MAXCOUNT 5
struct IsdnCardState *cs = dev_id;
u8 valisac, valhscx;
int count = 0;
return isac_read(cs, offset - 0x80);
}
spin_lock(&cs->lock);
do {
valhscx = hscx_read(cs, 1, HSCX_ISTA);
if (valhscx)
hscx_int_main(cs, valhscx);
valisac = isac_read(cs, ISAC_ISTA);
if (valisac)
isac_interrupt(cs, valisac);
count++;
} while ((valhscx || valisac) && (count < MAXCOUNT));
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
isac_write(cs, offset - 0x80, value);
}
#define MAXCOUNT 5
static void
gazel_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
......@@ -292,7 +277,7 @@ gazel_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
printk(KERN_WARNING "Gazel: Spurious interrupt!\n");
return;
}
ista = readreg_ipac(cs, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
do {
if (ista & 0x0f) {
val = hscx_read(cs, 1, HSCX_ISTA);
......@@ -316,13 +301,13 @@ gazel_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg_ipac(cs, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
count++;
}
while ((ista & 0x3f) && (count < MAXCOUNT));
writereg_ipac(cs, IPAC_MASK, 0xFF);
writereg_ipac(cs, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
}
static void
......@@ -445,7 +430,7 @@ static struct card_ops gazel_ops = {
.init = gazel_init,
.reset = gazel_reset,
.release = gazel_release,
.irq_func = gazel_interrupt,
.irq_func = hscxisac_irq,
};
static struct card_ops gazel_ipac_ops = {
......
......@@ -191,13 +191,13 @@ static struct dc_hw_ops isac_ops = {
static u8
ipac_dc_read(struct IsdnCardState *cs, u8 offset)
{
return readreg(cs, cs->hw.sedl.isac, offset|0x80);
return readreg(cs, cs->hw.sedl.isac, offset+0x80);
}
static void
ipac_dc_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
writereg(cs, cs->hw.sedl.isac, offset|0x80, value);
writereg(cs, cs->hw.sedl.isac, offset+0x80, value);
}
static void
......@@ -299,17 +299,26 @@ sedlbauer_interrupt(int intno, void *dev_id, struct pt_regs *regs)
hscxisac_irq(intno, dev_id, regs);
}
static u8
ipac_read(struct IsdnCardState *cs, u8 offset)
{
return ipac_dc_read(cs, offset - 0x80);
}
static void
ipac_write(struct IsdnCardState *cs, u8 offset, u8 value)
{
ipac_dc_write(cs, offset - 0x80, value);
}
static void
sedlbauer_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
struct IsdnCardState *cs = dev_id;
u8 ista, val, icnt = 5;
if (!cs) {
printk(KERN_WARNING "Sedlbauer: Spurious interrupt!\n");
return;
}
ista = readreg(cs, cs->hw.sedl.isac, IPAC_ISTA);
spin_lock(&cs->lock);
ista = ipac_read(cs, IPAC_ISTA);
Start_IPAC:
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
......@@ -334,7 +343,7 @@ sedlbauer_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
val = 0x01;
isac_interrupt(cs, val);
}
ista = readreg(cs, cs->hw.sedl.isac, IPAC_ISTA);
ista = ipac_read(cs, IPAC_ISTA);
if ((ista & 0x3f) && icnt) {
icnt--;
goto Start_IPAC;
......@@ -342,8 +351,9 @@ sedlbauer_ipac_interrupt(int intno, void *dev_id, struct pt_regs *regs)
if (!icnt)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "Sedlbauer IRQ LOOP");
writereg(cs, cs->hw.sedl.isac, IPAC_MASK, 0xFF);
writereg(cs, cs->hw.sedl.isac, IPAC_MASK, 0xC0);
ipac_write(cs, IPAC_MASK, 0xFF);
ipac_write(cs, IPAC_MASK, 0xC0);
spin_unlock(&cs->lock);
}
static void
......
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